Basic Product Information

Product type: VMIVME-5620 is an Encore HSD compatible HSD simulator, designed with dual Eurocard, and is a high-performance HSD interface device.

Connection method: Connect to Encore HSD/IBL interface or other HSD compatible devices through two 50 core flat cables with socket connectors at both ends.

Core components: Equipped with an integrated VMEbus interface (Cypress VIC068) and an onboard local bus with processor and memory, capable of interpreting host based I/O control block (IOCB) lists (IOCL).

Main functions and modes

working mode

HSD main mode: used to drive HSD peripherals, by interpreting the IOCL in the VMEbus global memory, sending external function commands to HSD peripherals, receiving device status, and transferring data blocks with devices. It also supports external mode, where HSD peripherals control the addressing and data transfer of VMEbus global memory.

HSD slave mode: It can be used as an HSD slave in a VME based computer or embedded controller, driven by an HSD host in another computer. The HSD host can be an Encore/Soul HSD on the SEL bus or another VMIVMME-5620 in the VME based computer.

IBL mode: allows two HSD compatible controllers (one of which can be an Encore HSD controller) to form a high-speed link without the need for cross cables and will re route some signals.

Featured Features

Can minimize host software overhead and execute a list of commands in memory.

Supports IBL compatible high or low priority, HSD external mode, data buffers (FIFOs), data and command chains, block transfer, 32-bit DMA transfer (via HSD bus).

As a VMEbus master-slave device, it supports command chain and data chain functions. The command chain enables the board to automatically execute the next IOCB in the list after completing the current IOCB execution, and only requires the host CPU to participate after the entire IOCB list is completed; A data link allows data to be passed in or out of non contiguous parts of memory.

Performance parameters

Transmission rate: The transmission rate between VMIVME-5620 is 4 Mbytes/sec (32-bit wide); The transmission rate from VMIVME-5620 to HSD depends on HSD, with a maximum of 3.2 Mbyte/s (the transmission rate may decrease due to factors such as cable length, operating mode, and VMEbus memory speed).

Transmission specification: The maximum block size is 256 Kbyte (16 bit transmission counter); Each HSD cycle has a transmission width of 32, 16, or 8 bits; The transmission mode is bidirectional half duplex; The address counter is 32-bit; Commands/controls come from a list in memory and support D32, D16, or D8 (EO) DMA.

VMEbus transmission

Slave: SAD024: SD32 A24: A16: AD0: D32: D16: D8 (EO), addressable at 64 byte boundaries through jumpers.

Host: A32: MBLT32 A32: A24: A16: D32: D16: D8 (EO): BLT, bus request level is 0, 1, 2 or 3, interrupt level and vector are programmable, bus authorization delay is 50 ns.

Hardware and Connection

I/O cable: Two 50 core (twisted pair flat ribbon) cables (not included in the product), VMIC recommends using high-quality twisted pair with overall shielding when the length exceeds 50 feet.

Maximum cable length: 250 feet.

System Controller Mode: When located in the first slot of the chassis, it can serve as a system controller with features such as SYSCLK driver, Iack daisy chain driver, level four bus arbiter (polling or priority), BERR timeout watchdog, etc. (only available as a system controller).

Physical and environmental parameters

Temperature: Operating temperature from 0 to 55 ° C, storage temperature from -20 to 85 ° C.

Humidity: 20% to 80% relative humidity, no condensation.

Altitude: The working altitude can reach 10000 feet.

Cooling method: forced air convection.

Size: Dual height Eurocard (6U), 160 mm x 233.35 mm.

Power requirements:+5 VDC, maximum 5.0 A, typical 3.5 A.

Basic Product Information

Product type: VMIVME-5588 is a high-performance, daisy chain VME to VME network high-speed reflective memory board that supports interrupt functionality.

Core function: Data transfer is achieved by writing data to the onboard global RAM, and the data is automatically sent to the corresponding memory locations of all reflective memory boards on the network, providing a fast and efficient way for data sharing between distributed computer systems.

Main performance parameters

Network speed and transmission rate: High speed and easy-to-use network, serial speed up to 1.2 Gbaud; The data transmission rate is 29.5 Mbyte/s when there is no redundant transmission, and 14.8 Mbyte/s when there is redundant transmission.

Node and Distance: Supports up to 256 nodes; The distance between multi-mode fiber optic connection nodes can reach 1000 feet, single-mode fiber optic is 10 kilometers, and dual axis cable is 30 meters.

Memory configuration: The onboard SRAM can be configured from 256 Kbyte to 16 Mbyte, with corresponding addressing boundaries for different memory options; Supports A24: A32: D32: D16: D8 memory access.

Access and cycle time: Write access time is 100 ns, read best case is 200 ns, read worst case is 400 ns; VME write cycle time is 200 ns (20 Mbyte/s), read best case is 320 ns (12.5 Mbyte/s), read worst case is 520 ns (7.7 Mbyte/s).

Features

Interrupt function: Any node can generate interrupts to any or all other nodes by writing byte registers. There are three user-defined interrupts with functions, priorities, and vectors; Interrupts follow data transmission and are only confirmed after data reception. FIFO can stack up to 512 interrupts.

Error management: Utilizing the error detection function of the fiber channel encoder/decoder and additional interleaved parity encoding and checking to detect errors; Assuming a light error rate of 10-12, the error rate of VMIVME-5588 is 1.3 × 10 ^ -10 transmissions, and the undetectable error rate is less than 1.64 × 10 ^ -20 transmissions; If a node detects an error, it will remove the erroneous transmission. If enabled, it will generate a VMEbus interrupt.

Redundant transmission mode: It can work in redundant transmission mode, where each transmission is sent twice, with priority given to the first transmission. If an error occurs, the second transmission is used, and if both transmissions fail, the transmission is removed. In this mode, the probability of both transmissions containing errors is extremely low.

Data protection: After error checking, the received data is placed in the receive FIFO, and after arbitration with VMEbus access, it is written to SRAM and send FIFO; To prevent FIFO overflow in design, a status register bit will be set and an interrupt may be generated when the FIFO is half full. If it exceeds half full, the VMEbus throttling mode will be activated; If the receive FIFO exceeds half full, VME access will be paused.

Other features: No need for a processor to participate in network operations, no processor overhead; Any node can reset any or all other nodes; Compatible with VMIVME-5578 software; Software addressable digital output bits for interface with VMIVME-5599 optical switch board or other user-defined purposes; There are bits in the status register used to verify whether data is being transmitted in the loop and to measure network latency.

Hardware and Connection

Board type: Two slot 6U VMEbus board.

Node identification: Each node has a unique identification number between 0-255, determined by jumper wires on the board during hardware system integration, and can be read by software by accessing onboard registers.

Cable options: There are multi-mode or single mode fiber optic, dual axis cable options; VMIC offers compatible multi-mode fiber optic cables (ST connectors, up to 1000 feet, etc.) and dual axis cables (9-pin D-type connectors, up to 30 meters, etc.), but does not provide single-mode fiber optic cables. The equipment is compatible with single-mode fiber optic cables (SC connectors, up to 10 kilometers).

Connection configuration: Adopting Daisy chain ring configuration, each transmission is passed in the ring until it returns to the source node. The node will retransmit the received non self initiated transmission and can insert its own transmission in the transmission gap.

Physical and environmental parameters

Temperature range: 0 to 65 ° C for forced air cooling operation, -40 to 85 ° C for storage.

Relative humidity: 20% to 80%, no condensation.

Mean Time Between Failures (MTBF): 88005 hours (217F standard).

Power requirement:+5 VDC, maximum 5.0 A.

Product Overview

VMIVME-5532L is a high-performance and easy-to-use VMEbus fiber optic repeater link that connects two or more VMEbus systems through fiber optic cables. The repeater link consists of a set of two boards (VMIVME-5532M as the motherboard and VMIVMME-5532S as the slave board), allowing the I/O board of a VMEbus slave located in one VMEbus chassis to be controlled by a VMEbus host located in another chassis, while supporting local control from a local VMEbus host in the chassis, achieving multi host functionality from the chassis.

Core functions and features

Key Features

Software transparency, direct communication from the host chassis to the slave chassis, no software overhead (one-way link control, two-way data transmission), supports plug and play operation.

In register enabled mode, in addition to basic functions, it also includes registers in the short I/O space that involve multi host operations from the chassis.

Supports 8-bit, 16 bit, and 32-bit data transmission, and supports 16 bit, 24 bit, and 32-bit addressing.

The VMEbus system is completely electrically isolated from each other, with fiber optic cables up to 6560 feet (2000 meters) in length.

Compared to standard repeaters, the advantages include compact cables, strong noise resistance, high voltage isolation, and no electromagnetic interference from cables.

Slave repeaters include bus arbitrators, bus requesters, system controllers, and control/status registers, used to operate and monitor slave chassis in redundant repeater links or multi host applications.

Features

Overview

The master VMEbus chassis can communicate with multiple slave chassis by using multiple relay links in a star configuration. Any VMEbus host in the host chassis can access (read or write) any slave board in the slave chassis, and only non interrupt slave boards are allowed in the slave chassis. When a VMEbus host (usually a CPU board) addresses any card in the slave chassis, the link between the host chassis and the slave chassis is automatically established. Whenever a host in the main chassis issues a VMEbus read/write cycle, it will be repeated to the slave chassis. If any slave board in the slave chassis responds to the address, data transfer (read or write) will occur between the chassis and a data transfer acknowledgement (DTACK) will be generated to the host (in the main chassis) to complete the cycle.

VMEbus compatibility

Compliant with VMEbus specification revised version C1, supporting A32, A24, A16, as well as D32, D16, D08 (EO). Among them, VMIVME-5532M is a DTB slave (used for the main chassis), and VMIVME-5532S is a DTB master (used for the sub chassis), both with dual height and single slot external specifications.

Arbitrator and Requester

Arbitrator: SGL

Requester: ROR, only supports bus request level 3 (BR3 *)

BG3IN * – BG3OUT * Maximum latency: 100 ns

BG3IN * – BBUSY * Maximum latency: 200 ns

Link register (available when enabled)

Including board recognition, burst mode, host bus authorization, VMEbus activity (slave chassis), burst mode key, VMEbus key, Sysreset enable key, slave chassis reset key, etc.

Repeat to the VMEbus signal from the chassis

A1 to A31, D0 to D31、DS0*、DS1*、WRITE*、SYSRESET*、SYSCLK、AM0、AM2、AM4、AM5、LWORD*  And IACK * (note: the following signals are regenerated from the chassis rather than sent through fiber optic cables: SYSCLK, AM0, AM1, AM3, and IACK *).

Return the VMEbus signal to the host box

D0 to D31, DTACK*

Active but non repetitive VMEbus signals from the chassis

BR0*-BR3*、BGIN0*-BGIN3*、BG0OUT*-BG3OUT*、BBSY*

Other parameters

Address modifier: 09, 0D, 29, 2D, 39, 3D

Read cycle overhead: maximum 4.0 µ s

Write cycle cost: maximum 4.0 µ s

Transmission rate (maximum) (10 foot cable length): Assuming the slave board in the chassis responds within 250 ns, with a minimum of 1MB/s (D32)

Cable specifications

Mode: Multi mode

Length: 5 to 6560 feet (1.5 to 2000 meters)

Fiber size: 62.5 microns

Package size: 125 microns

Buffer layer size: 900 microns

Maximum attenuation at 1300nm (including connector): 9.0 dB

Bandwidth at 1300nm: 500 MHz km

Protective cover length: 20 to 60 mm

U. L./NEC rating: OFNP

Connector style: ST, 2.5mm bayonet, both ends

Quantity required for each link: 2 (cables that meet this specification are provided with VMIVME-5532L. If you need to order cables separately, please refer to specification number VMICBL-000-F3-XXX)

Physical/Environmental Specifications

Size: Double height (6U) board 160 × 233.35 mm

Power requirements: VMIVME-5532S is a typical 2A at 5 VDC, with a maximum of 2.5 A; VMIVME-5532M is a typical 2A at 5 VDC, with a maximum of 2.5 A

Temperature: Operating temperature 0 to 65 ° C, storage temperature -20 to 85 ° C

Humidity: Relative humidity during operation is 20% to 80%, with no condensation

Altitude: up to 10000 feet (3048 meters) during operation

Cooling: forced air convection

Ordering Options

In VMIVME-5532L, A represents the type of fiber optic connector (0=ceramic core ST connector, 1=stainless steel core ST connector), and BC represents the cable length (00=no cable, 01=5 feet (1.5 m) and other options).

Only the VMIVME-5532M and VMIVMME-5532S cards have corresponding ordering options, with ABC of 000 (options reserved for future use).

The link includes one VMIVME-5532M (master) board, one VMIVME-5532S (slave) board, and two cable assemblies.

Connector data

Compatible connector: ST connector

Printed Circuit Board Fiber Optic Connectors: Fiber Optic Receiver HFBR-2416 (HP), Fiber Optic Transmitter HFBR-1414 (HP)

Product Overview

VMIVME-5531L is a high-performance and easy-to-use VMEbus fiber optic repeater link that connects two or more VMEbus systems through fiber optic cables. The repeater link consists of a set of two boards, allowing the VMEbus slave I/O board located in one VMEbus chassis to be controlled by a VMEbus host located in another chassis. The VMEbus chassis containing the VMEbus host is called the host chassis, while the VMEbus slave board is located in the slave chassis.

Core functions and features

Key Features

Software transparency, direct communication from the host chassis to the slave chassis, without software overhead (one-way link control, two-way data transmission).

Plug and play operation, supports 8-bit, 16 bit, and 32-bit data transmission (6U slave), supports 16 bit, 24 bit, and 32-bit addressing (6U slave), supports 8-bit, 16 bit data, 16 bit, and 24 bit addresses (3U slave).

The VMEbus system is completely electrically isolated from each other, with fiber optic cables up to 6560 feet (2000 meters) in length.

Compared to standard repeaters, the advantages include compact cables, strong noise resistance, high voltage isolation, and no electromagnetic interference from cables.

A VME to VME link consists of two boards and two fiber optic cables (motherboard: 6U, slave board: 6U or 3U).

Features

Overview

The master VMEbus chassis can communicate with multiple slave chassis by using multiple relay links in a star configuration. Any VMEbus host in the host chassis can access (read or write) any slave board in the slave chassis, and only non interrupt slave boards are allowed in the slave chassis. When a VMEbus host (usually a CPU board) addresses any card in the slave chassis, the link between the host chassis and the slave chassis is automatically established. Whenever a host in the main chassis issues a VMEbus read/write cycle, it will be repeated to the slave chassis. If any slave board in the slave chassis responds to the address, data transfer (read or write) will occur between the chassis and a data transfer acknowledgement (DTACK) will be generated to the host (in the main chassis) to complete the cycle.

VMEbus compatibility

Compliant with VMEbus specification revised version C1, supporting A32, A24, A16, as well as D32, D16, D08 (EO). Among them, VMIVME-5531M is a DTB slave (used for the main chassis), and VMIVME-5531S is a DTB master (used for the sub chassis).

Appearance specifications

Dual height, single slot: 5531M, 5531S

Single height, single slot: 5531S

Repeat to the VMEbus signal from the chassis

6U: A1 to A31, D0 to D31, DS0 *, DS1 *, WHITE *, SYSRESET *, AM2, AM4, AM5, and LWORD*

3U slave: A1 to A23, D0 to D15, DS0 *, DS1 *, WRITE *, SYSRESET *, AM2, AM4, AM5, and LWORD*

Return the VMEbus signal to the host box

6U: D0 to D31, DTACK*

3U: D0 to D15, DTACK*

Other parameters

Address modifier: (09, 0D), 3, 29, 2D, 39, 3D

Read cycle overhead: maximum 4.0 μ s

Write cycle cost: maximum 4.0 μ s

Transmission rate (maximum) (10 foot cable length): Assuming the slave board in the chassis responds within 250ns, with a minimum of 1MB/s (D32) (applicable to 6U)

Cable specifications

Mode: Multi mode

Length: 5 to 6560 feet (1.5 to 2000 meters)

Fiber size: 62.5 microns

Package size: 125 microns

Buffer layer size: 900 microns

Maximum attenuation at 1300nm: 9.0dB (including connector)

Bandwidth at 1300nm: 500MHz km

Protective cover length: 20 to 60mm

U. L./NEC rating: OFNP

Connector style: ST, 2.5mm bayonet, both ends

Quantity required for each link: 2 (cables that meet this specification are provided with VMIVME-5531L. If you need to order cables separately, please refer to specification number VMICBL-000-F3-xxx)

Physical/Environmental Specifications

Size: Dual height (6U) board 160 × 233.35mm, single height (3U) board 160 × 100.0mm (for slave only)

Power requirements: VMIVME-5531S and VMIVME-5531M are both typical 2A at 5VDC, with a maximum of 3.0A

Temperature: Operating temperature 0 to+65 ° C, storage temperature -20 to+85 ° C

Altitude: 0-10000 feet (3000m) during operation

Humidity: Relative humidity during operation is 20% to 80%, with no condensation

Cooling: forced air convection

Mean Time Between Failures (MTBF): 424895 hours, 431525 hours

Ordering Options

In VMIVME-5531L, A represents the slave specifications (0=6U slave, 1=3U slave), BC=00 represents unused, and D, E, F represent cable length and other information.

Only the VMIVME-5531M and VMIVMME-5531S cards have corresponding ordering options.

The link includes one VMIVME-5531M board, one VMIVME-5531S board, and two cable assemblies.

Connector data

Compatible connector: ST connector

Fiber optic receiver: HFBR-2416 (HP)

Fiber optic transmitter: HFBR-1414 (HP)

Printed circuit board fiber optic connector

Product Overview

VMIVME-4514A is a 16 channel scanning analog I/O board with built-in testing capabilities and P2 I/O connections. It provides 16 analog output channels and 16 analog input channels, with both input and output resolutions of 12 bits. Each channel of the analog output is designed with a sample and hold (S&H) output, and 16 analog inputs are digitized by a 12 bit analog-to-digital converter (ADC) controlled by a scanner, which can store data in dual port memory.

Core functions and features

Main functions

Continuously digitize all input channels and store the results in dedicated channel dual port registers (automatic scanning mode).

It has three A/D operation modes: automatic scanning mode when powered on, random polarization mode, and scanning polarization mode.

Supports P2 I/O connection, built-in onboard testing function, capable of testing 100% of active components.

Using semiconductor output switches does not affect accuracy (output impedance 0.1 Ω).

Analog input characteristics

16 single ended/differential (SE/Diff) analog input channels, 12 bit A/D converter.

Supports unipolar (0 to+10 V, 0 to+5 V) or bipolar (± 2.5 V, ± 5 V, ± 10 V) inputs.

A/D throughput of 40 kHz, optional low-pass filter, with overvoltage protection function.

Input relevant parameters: A/D conversion time of 15 µ s, acquisition time of 10 µ s, common mode range of ± 11 V (maximum), common mode rejection ratio of 82 dB, maximum input bias current of 2 nA, overvoltage protection of ± 40 V (maximum), data transmission type of D16.

Accuracy: 0.04% range ± 2 mV, can be calibrated to 0.02% ± 0.5 mV.

Analog output characteristics

16 sample and hold (S&H) analog output channels, 12 bit D/A converter.

The output has short-circuit protection and supports unipolar (0 to+10 V, 0 to 5 V) or bipolar (± 2.5 V, ± 5 V, ± 10 V) output.

The program can choose a scanning rate to provide better response for complex output functions, with an output current of 10 mA.

Output related parameters: resolution of 12 bits (per channel S&H), output impedance of 0.1 Ω, total error of 0.05% of full-scale range, and maximum setup time of 1.7 ms to reach 1 LSB.

Refresh update rate: default 550 Hz, fast refresh 1600 Hz (note: output refresh temporarily stops during input analog-to-digital conversion, so the output refresh rate decreases with the increase of analog-to-digital conversion rate. In the worst case scenario of automatic scanning mode, the default refresh rate is 300 Hz, and fast refresh is 900 Hz).

Operation Mode

Automatic scanning mode: Through power on system reset or program selection execution, all channels are continuously scanned, and digital data is stored in 16 16 bit dual port registers. It only needs to be read from the dual port registers without further programming.

Random polling mode: It is necessary to control the program to generate a single transition, and determine whether the transition is completed through the polling transition end status bit.

Scanning polarization mode: Perform a single scan of all channels, and determine whether the scan is complete through the polarization scan end control bit.

Other Features

Board address and VMEbus access

The physical address of the board can be selected through jumper wires on the board, and decoding the VMEbus address lines A06 to A15 is used for board selection.

The address modification bit is selected and decoded through jumper wires, supporting non privileged short I/O, monitoring short I/O, or both. The factory is configured to monitor short I/O.

Data transmission and format

Output data transmission: The data of each analog output channel is directly written to the RAM location dedicated to a specific channel on the board, and then periodically retrieved from the RAM and converted into analog voltage, which is transmitted to one of the 16 output sample and hold buffers.

Analog input format: The analog input is first digitized, and then the 12 bit digital value (D11 to D00) is read from a single storage word position in the channel specific dual port register. In binary complement mode, the high four bits (D15, D14, D13, D12) are read as sign extensions of the 12 bit digital value, otherwise they are read as logical zeros.

Testing and Resetting

Simulated I/O testing mode: Built in testing logic supports testing all active components (including output switches) on the board, supports real-time and offline testing, and utilizes the ADC multiplexer on the board.

Memory testing: Designed with onboard dual port memory, additional operational verification can be performed by performing memory diagnostics.

System reset: Initialize the board to a state where all analog outputs and output connectors (P2) are disconnected through the VMEbus application system reset signal.

Front panel malfunction LED

If an error occurs during the diagnostic process, the software controlled LED will light up to visually indicate the fault. The LED will be reset and lit by the system during power up, and will turn off after successful diagnosis.

Bus interface and physical environment characteristics

Bus interface compatibility: Compliant with VMEbus specification Rev. C. 1, with features such as A16:29, 2D: D16, D08 (EO) (slave), and 6U external specifications.

Physical characteristics: Standard VME double width board, size 160 × 233.5 mm.

Environmental characteristics: Operating temperature from 0 to 55 ° C, storage temperature from -40 to+85 ° C, relative humidity from 20 to 80% (non condensing), using convection cooling.

Power requirements:+5 VDC (± 5%), maximum 5.6 A, typical 3.0 A.

Connector: Standard P2 user I/O (with extended ground pins on P1 and P2).

Mean Time Between Failures (MTBF): 29800 hours (217F).

Application field

Including factory automation and instrumentation, process control, laboratory instruments, machine monitoring, data acquisition systems, simulation and training, etc.

Product Overview

VMIVME-4150 is a 12 bit analog output board that provides 12 fully isolated high-quality 12 bit analog output channels on a single 6U spec VMEbus board. Each channel is electrically isolated from all other channels and VMEbus, with multiple output ranges and functions, suitable for various industrial scenarios.

​Core functions and parameters

Key Features

12 completely isolated analog output channels, with isolation voltages of up to 1000 Vpk between channels and between channels and the bus.

12 bit resolution, bipolar voltage output range can be selected as ± 2.5 V, ± 5 V, or ± 10 V; unipolar voltage output range can be selected as 0 to 2.5 V, 0 to 5 V, or 0 to 10 V.

The voltage output has a 10 mA load capacity within the full ± 10 V range, with optional 4 to 20 mA, 0 to 20 mA, or 5 to 25 mA current loop outputs.

The voltage output accuracy is 0.05%, and the current loop output accuracy is 0.08%. There are 4, 8, or 12 channel configurations to choose from.

Using optical data coupling to provide complete galvanic isolation, static read back data registers simplify program control, and the front-end panel can be used for on-site connections.

The program controlled voltage output connection/disconnection operation facilitates system testing.

working principle

Internal functional structure

Composed of VMEbus interface, channel control, isolated analog output, and DC/DC power converter.

VMEbus interface: Communication with VMEbus is controlled by a single electrically programmable logic device (EPLD). Data and control registers are distributed in three channels to control the EPLD, respond to bus data transmission requests and control data flow, and generate data transmission acknowledgement (DTACK *) after completion of transmission.

Channel control: The data transmission control of the output D/A converter is divided into three identical 4-channel groups, each group is allocated and controlled by an EPLD, supporting optional configurations of 4, 8, or 12 channels. Each channel control EPLD contains four data registers, which receive channel data words from VMEbus and provide independent data serializers for each channel.

analog output channel

Isolation: Each output channel is isolated from VMEbus and all other channels through an isolated DC/DC converter and four optocouplers. The DC/DC converter provides ± 15 VDC isolated power supply, while the optocouplers isolate digital control signals.

Digital to Analog Conversion: A serial digital to analog (D/A) converter receives a 12 bit data word and generates a specific range of output voltage. The output module converts it to a specified voltage or current output according to the configuration.

Voltage and current output: All outputs are factory configured as unipolar voltage, bipolar voltage, or constant current. The voltage output module includes a unity gain buffer and an output switch, while the current output module includes a voltage current converter and a transmission transistor.

DC/DC power converter: Each channel contains a DC/DC converter that obtains isolated ± 15 VDC power from the VMEbus+5 VDC power bus to supply power to the isolated portion of the channel.

Configuration and Installation

Unboxing process

Some components are sensitive to electrostatic discharge, and unused boards should be stored in their original packaging. When placed on the workbench, it is recommended to insert conductive materials underneath. After receiving the goods, it is necessary to check whether there is any transportation damage. If there is, a claim should be made to the carrier and VMIC should be notified. When installing or removing the board, power off and insert the board correctly into the chassis slot.

run setup

The board address and I/O access mode are controlled by replaceable jumpers on the board, including address modifier jumpers (E15), base address selection jumpers (E13, E14, E16), and output range selection jumpers. Different jumper configurations correspond to different functions and parameters.

Bipolar voltage output: It can be configured as 2.5 V, 5 V, or 10 V through user installed jumpers, and different channels correspond to different jumpers and adjustable potentiometers.

Unipolar voltage output: configurable for 0 to 2.5 V, 0 to 5 V, or 0 to 10 V, with corresponding jumpers and adjustment components.

Current loop output: Each channel has jumper wires that can be configured with internal or external power supply, supporting different current ranges.

calibration

Before leaving the factory, it has been fully calibrated. If recalibration is required, digital multimeters, card cages, expansion cards, resistors, and other equipment need to be prepared to calibrate the bipolar voltage output, unipolar voltage output, and current output according to specific steps. After calibration, appropriate sealing agents need to be used to re seal and adjust the components.

I/O cable and front-end panel connector configuration

The front-end input connectors (P3 and P4) are standard ultra small 37 pin female D-shaped connectors with specific pin layouts and assignments, corresponding to different outputs and functions.

Programming

Register Mapping

Communication is carried out through 16 block control, status, data, and identification registers mapped to the A16 short I/O space or standard A24 data space, including board identification registers (BIR), control/status registers (CSR), output data registers (ODR), etc.

Board Identification Register (BIR): Contains the identification code (22 million hexadecimal) of the VMIVME-4150 board, located in the first two words of the board base address, and is read-only.

Control/Status Register (CSR): Provides control and monitoring of board functions, including output enable, output load cycle status, data encoding, self-test LED, etc. Each bit has specific functions.

Output Data Register (ODR): Each of the 12 analog outputs has a dedicated 12 bit output data register that supports read and write operations. The data is transmitted to the output D/A converter in a serial manner.

Reset operation

The system reset operation will reset all read and write registers to zero, causing the board to be in a specific state, such as analog output level, status, data encoding, and front-end panel LED status, all of which will change accordingly.

Analog output control

The output register and data format are controlled by CSR bit D12 and can be in offset binary format or binary complement format. The output range is determined by the jumper on the board, and the voltage output can be controlled by the bit in CSR to determine the connection status with the output connector. The data is transmitted from the output data register to the output D/A converter through an internal output load cycle, during which there is a corresponding busy flag indication.

maintenance

Provided information on product maintenance and upkeep, such as checking system power, software, configuration, connections, etc. in case of product malfunction. We do not recommend user level repairs. If you need to return the item, please contact VMIC to obtain a Return Merchandise Authorization (RMA) number. The drawings and tables in the manual are for reference only.

Product Overview

VMIVME-3126 is an 8-channel or 16 channel high-resolution fully isolated analog-to-digital converter (ADC) board that can accept 2-wire isolated signals ranging from 50 mV to 10 V as input, providing isolation between channels and between channels and VMEbus. Each input is sampled and digitized by a dedicated 24 bit analog-to-digital converter, which automatically scans all inputs after on-board self-test is completed upon power on. Its accuracy is optimized through internal gain and offset correction, which are applied by a digital signal processor (DSP) in real-time mode and determined in calibration mode.

Core functions and parameters

Key Features

8 or 16 isolated input channels with source protection, 16 bit data.

The isolation voltage between channels and between channels and VMEbus is 1500 VDC (1000 VAC).

Each channel is equipped with a dedicated digitizer with an input range of ± 50 mV to ± 10 V, which can be selected by software according to the channel.

Software controlled bandwidth, 0.05 to 26 Hz (implemented through an internal DSP with a 6th order low-pass filter).

Real time offset and gain correction based on DSP, with E ² PROM storage of calibration coefficients supported by DSP (without fine adjustment potentiometer).

The conversion rate per channel is 100 SPS (samples per second).

Software controlled RTD excitation (200 mA/400 mA per channel), software controlled open circuit sensor detection.

Supported by VMIC’s I/O controller, optional current termination resistors and optional increase in input range are available.

Application field

Including power plant monitoring, machine monitoring, data acquisition, as well as applications related to RTDs, strain gauges, and thermocouples.

Features

VMEbus access and compatibility: The response to address modifiers can be selected through jumpers, including A24 or A16 address space, monitoring or user permissions (or both), D16/D8 (EO) DTB slave, with a 6U external specification.

Board address: The VMEbus base address is configured by jumper fields, and each address A23 to A8 has a jumper, so the address space occupied by the board is 256 bytes.

Operation Mode

Sampling mode: After successful onboard self-test, all inputs are sampled simultaneously when powered on.

Calibration mode: Enter calibration mode by setting the bits in the board and status register (BSR). Each channel is calibrated by the DSP using up to seven external calibration voltage inputs. The gain and offset coefficients are stored in the DSP for real-time calibration. Users can set another bit in the BSR to write the coefficients to the E ² PROM or input their own gain and offset coefficients.

Configuration mode: Enter configuration mode by setting the bit in BSR, and each channel can be individually configured with range, filter frequency, data output format, and input type (normal, RTD excitation, open circuit sensor detection).

Automatic zeroing mode: Enter the automatic zeroing mode by setting the bit in BSR. In this mode, each input is disconnected from the field through an electronic switch, connected to a ground reference, digitized, and compared with the ideal ground reading. Adjust the offset coefficient to eliminate this difference. This technology can compensate for temperature changes without calibration operations.

Self check: After the system or software is reset, it automatically runs a self check to test the onboard RAM and each ADC. The status register indicates the success or failure status of these components.

Front panel indicator: The program controlled front panel LED lights up red during startup, calibration, and channel reconfiguration, and turns off after successfully completing the above modes.

Board Identification: The Board Identification Register (BIR) contains the VMIVME-3126 identification code.

Input characteristics

Number of input channels: 8 or 16 isolated 2-wire channels, each with an active protection pin.

Isolation voltage: 1500 VDC and 1000 VAC between channels and between channels and VME.

Input range (software control)

Bipolar: ± 50 mV, ± 100 mV, ± 500 mV, ± 1 V, ± 5 V, ± 10 V

Monopolar: 0 to 50 mV, 0 to 100 mV, 0 to 500 mV, 0 to 1 V, 0 to 5 V, 0 to 10 V

Input filter: 0.05 to 26 Hz low-pass, 6th order, filter cut-off frequency controlled by software, filtering executed by DSP software, approximate Bessel response.

Accuracy: The accuracy of the full-scale range varies in different ranges, such as ± 10 V, ± 5 V, 0-10 V, 0-5 V for 0.0030% full-scale, ± 1 V for 0.0076% full-scale, etc. (applicable after calibration of the selected input voltage range).

Stability: The temperature drift is ± V/° C, and the offset error caused by temperature can be eliminated by automatic zeroing.

Input noise: The typical and maximum noise varies under different filter settings and ranges, with noise units in μ V RMS.

Bandwidth of each input: DC to Fc, Fc is 0.05 to 26 Hz (default cutoff frequency is 26 Hz).

Input impedance: minimum, powered on (not applicable to boards equipped with current input options).

Channel crosstalk: The maximum is -150 dB at 1 kHz and Fc=1 Hz.

Isolation mode suppression: 160 dB at 60 Hz and Fc=1 Hz.

Overvoltage protection: ± 25 V wire to wire.

RTD excitation (software control per channel): typical 20 PPM/° C, maximum 20%.

Open circuit sensor detection (controlled by software for each channel): It functions normally in all ranges below ± 1 V (0-1 V).

Channel protection: Active output with unity gain and 1 k Ω source impedance.

Current terminal resistance: see the available options section.

Transmission characteristics

Transfer function: E IN=E LO+[E fsr × 65536N ADC], where E IN is the channel input voltage, E LO

For the lower limit of the input range, E fsr is the full-scale input range, and N ADC is the output code.

Resolution: 16 bits.

Input sampling: All inputs are sampled simultaneously.

Integral nonlinearity: maximum ± 0.005% compared to the optimal straight line.

Channel sampling rate: 100 SPS per channel, total 1600 SPS.

Data encoding: Software programmable, binary complement or straight/offset binary.

Data buffer memory

Buffer size: 16 consecutive 16 bit data words.

Access time: 400 ns from DS to DTACK.

VMEbus access: D8 or D16.

Available options (see ordering options)

Number of input channels: 8 or 16 2-wire channels.

Current terminal resistor: a resistor placed at both ends of the input, with a maximum continuous input current of 25 mA (calibrated input specified in current units rather than voltage units).

Increase input range: The input structure can handle an input range of up to ± 200 VDC.

Physical/Environmental Characteristics

Temperature range: working (standard VME slot) 0 to+65 ° C, storage -40 to+85 ° C.

Humidity: 10 to 80% relative humidity, no condensation.

Altitude: Working up to 10000 feet (3048 meters).

Cooling: forced air convection (standard VME slot).

Size: Dual height European card (6U) board, 160 x 233.35mm.

Weight: Maximum 700 g.

Input connectors: Two 64 pin DIN connectors.

Connector data

Recommended style for connecting components P3 and P4 I/O connectors

64 pin, compatible connector (96 pin discrete) AMP 925486-1*

Discrete line, female pressure contact point (64 pin discrete) AMP 530151-6**

(64 pin connector) connector housing Harting 09 02 064 0501

Note: * The middle row is not connected; **AMP crimping tool part number 90301-2.

Power requirements

+5 VDC (± 5%), maximum 2.8 A.

Mean Time Between Failures (MTBF)

97850 hours (217F).

Product Overview

VMIVME-3100 is a mid performance 12 bit analog-to-digital converter (ADC) board that supports 16 single ended or 8-channel differential front-end analog inputs, as well as multiple multiplexing expansion boards. Expansion board utilizing AMXbus ™ The analog signal is routed from the multiplexer input to the ADC board, which also has built-in testing capabilities. The fault LED on the front-end panel can provide users with fault detection and isolation capabilities.

Core functions and parameters

Key Features

12 bit resolution, maximum conversion time of 9 μ s, acquisition time of 9 μ s (can be selected based on full-scale input voltage).

16 channel single ended multiplexer, 8-channel differential input option.

Onboard built-in testing logic for fault detection and isolation, equipped with front-end panel fault LED.

Onboard precision voltage source, supporting self check.

You can choose one ADC per slot or one ADC plus a slave MUX board.

It has overvoltage protection input, separate encoding/key controlled VME connector, dual European card appearance, and fault safety function in case of power failure.

Throughput

Analog to digital (A/D) throughput: The throughput time of the operation is the sum of the amplifier setup time (acquisition time) and the A/D conversion time. The A/D conversion time is 9 μ s, and the amplifier setup time depends on the input voltage range and gain setting.

System throughput: Supports multiple multiplexing expansion boards, and the total system throughput can be calculated according to the relevant formula, which is

F S= N(T 1+T 2+T 3)1（ Samples per second）， Where N is the number of channels, T1 is the acquisition time of the remote multiplexer, T2 is the setup time of the VMIVME-3100 amplifier, and T3 is the conversion time of the VMIVME-3100 ADC.

protection function

16 front-end analog inputs have overvoltage protection. When the+15V power supply is turned on, the maximum input voltage range is ± 35V; when the power supply is turned off, the maximum input voltage is+20V.

Operation Mode

Normal mode operation

Analog signals can be transmitted through the front panel P3 connector or AMXbus ™ (P2 connector) receiving, AMXbus ™ Supports multiple analog input multiplexing expansion boards.

The front-end panel input (P3 connector) supports 8 differential or 16 single ended analog inputs. In single ended mode, each input has a related ground signal, and multiple low-pass filter options are also available.

AMXbus ™ The operation supports connecting up to 16 VMIC multiplexer boards to one ADC, achieving high-density and low-cost analog input expansion, and also supports built-in testing functions related to VMIC analog output boards.

ADC conversion can be initiated through an external TTL compatible signal, and the external trigger conversion circuit is enabled by setting the bit in the control word.

Built in testing mode

The ADC board contains a Control Status Register (CSR), which can be used to select certain operating modes. Users can use the read and write capabilities of CSR to verify the DO-D14 function of VMIVME-3100 VMEbus logic.

On board 9 precision voltage sources (-10.000V, -7.500V, -5.000V, -2.500V, 0.000V,+2.500V,+5.000V,+7.500V,+10.000V) can be selected by the user testing subroutine to verify the correct operation and accuracy of the board, and can also be used for calibration.

Can be accessed through AMXbus ™ Interconnect VMIVME-3100, VMIVME-41XX, and VMIVME-32XX boards to perform loop testing from analog output to analog input. It can also be used in conjunction with VMIVME-4500 for fault detection and isolation.

VMEbus interface description

The VMEbus interface of VMIVME-3100 includes the logic required to connect the slave board to VMEbus and perform memory mapping in the VMEbus short I/O address space. In the write cycle of the board address, bits A01 to A15 are compared with the previously selected board address, which is selected by the DIP switch. If the address matches, a board selection signal is generated, which, together with the control signal received on the board, gates the data (DO to D15) to the CSR on VMIVME-3100.

The circuit requires+5V,+15V, and -15V voltages, with+5V provided to the board through P1 and P2 connectors. The onboard DC-DC converter generates+15V and -15V for the analog circuit

Programming related

Overview

The ADC board performs memory mapping in the VME short I/O address space, occupying only one word position within the 65535 byte VME short I/O address space. The board address is selected by DIP switches, and the short I/O space is mapped from FF0000 (hexadecimal) to FFFFF (hexadecimal). The ADC data register containing 12 bit converted digital data is a read-only register, while the control status register (CSR) is a read-write register used for board control. Since these two registers use the same address, CSR access and ADC conversion end register access are selected through data bit D15.

Description of Control Status Register (CSR)

The operating mode of the CSR programming selection board, CSR is a 16 bit read-write register. To initiate AD conversion, it is necessary to set data bit D6 in CSR and program data bits DO to D5 and D8 to D14 according to the desired operating mode. Data bit D15 is used to distinguish between two possible read cycles. Writing “0” to CSR can read the converted digital data from the ADC data register, while writing “1” can read CSR.

ADC board reads data format

To read 12 bit converted data, it is necessary to first write the low-level data bit D15 into CSR. The data is only valid when data bit D15 is read as logical ‘0’, and the valid data is included in data bits DO to D11.

Programming Example

Provides various MC68000 assembly language programming examples, including ADC conversion of P3 connector input and using AMXbus ™ Expansion of functions, testing and programming of ADC board, testing of analog output of VMIVME-4100 DAC board using ADC board, and verification of VMIVM-3200 multiplexer board in combination with VMIVME-4100 DAC board.

Configuration and Installation

Unboxing program

Some components are sensitive to electrostatic discharge, and unused boards should be stored in their original packaging. When placing the board on the workbench, it is recommended to insert conductive material underneath the board to provide conductive diversion. After receiving the goods, it is necessary to carefully inspect for any transportation damage. If there is any damage, a claim should be made to the carrier and a complete report should be sent to VMIC.

Physical installation

When installing or disassembling the board, the power should be turned off. Insert the board into the corresponding slot of the chassis, ensure correct alignment and orientation, and smoothly slide the card forward against the mating connector until it is firmly inserted.

Pre installation checklist

Before installation, it is necessary to confirm that the relevant theoretical and programming content has been read and applied. Check whether the jumper and board address switch settings installed by the factory meet the requirements, change the relevant settings as needed, confirm that the cable connection is correct, and calibrate by the factory. If recalibration is required, please refer to the relevant sections.

Board address selection switch

There are two address DIP switches on VMIVME-3100, each corresponding to an address bit or unused. When the switch is turned on, the corresponding address bit is compared with the logic “0”. During the reading and writing of the DAC board, all corresponding address bits must be compared with the switch position.

Other configurations

Address modifier response selection: The response method of the address modifier code on the board can be selected through jumper wires.

ADC output encoding selection: Factory configured for straight binary digital encoding with unipolar input and offset binary encoding with bipolar input, which can be changed to binary complement code through jumper wires.

Analog input full-scale range selection: Select the full-scale range to be digitized by the ADC through jumper (JC) and related gain resistor (R28).

RDELAY (optional) selection: The factory is configured with no RDELAY resistor, and a collection setup time of 9 μ s can be selected. Different RDELAY can be chosen as needed to obtain different collection times.

Connector Description

P1 and P2 connectors connect the VMIVME-3100 board to the VMEbus backplane. P1 contains address data and control lines, as well as all additional signals required for control data transmission and other bus functions. P2’s user I/O pins are provided by AMXbus ™ Used to control external multiplexing expansion boards and test analog output boards for VMIC.

The P3 connector is a Panduit 32 pin male connector that supports 16 single ended or 8-differential analog inputs, each with an associated analog ground pin.

calibration

There are four potentiometers adjusted on the VMIVME-3100, and the factory has correctly adjusted and applied anti loosening glue. If recalibration is required, the onboard precision benchmark needs to be calibrated first, and then used to recalibrate the ADC.

Maintenance and Warranty

maintenance

The maintenance section provides information on the maintenance and upkeep of VMIC products. If the product malfunctions, users should check the software, system configuration, electrical connections, etc. User level repairs are not recommended and should contact VMIC to obtain a Return Merchandise Authorization (RMA) number. The appendix contains drawings and charts for reference.

warranty

VMIC’s standard products are guaranteed to be free of material and process defects within 90 days from the date of shipment. For products that meet the warranty conditions, VMIC may choose to repair or replace them at its facilities. Customers are required to notify VMIC within a reasonable time after discovering defects. Prior to returning the product, they must contact the customer service department to obtain the call ticket number and RMA number. There are corresponding regulations on the transportation method and cost of the product. In some cases, VMIC does not assume warranty or liability, and the final determination of warranty eligibility is made by VMIC. The warranty period for replacement or repair products is the same as that of the original products.

Over warranty maintenance policy

VMIC’s maintenance policy for standard products is divided into two categories: product replacement and fixed price maintenance. All product repairs require return authorization, and repair pricing can be consulted with the factory representative. Payment should be made upon delivery or within 30 days after the delivery date selected by VMIC, and shipping costs should be borne by the customer (excluding warranty repairs). VMIC’s repaired products are guaranteed to be free of process and material defects for 90 days from the date of shipment to the customer, and repair rates may not apply to products that have suffered abnormal physical or electrical damage.

Product Overview

VMIVME-2540 is a 24 channel intelligent counter/controller that serves as a slave I/O module for VMEbus systems, providing high-precision digital measurement and function generation capabilities. It features a simple and consistent memory mapped user interface. It consists of three parts: a VMEbus slave DTB interface, a CPU with firmware and supporting logic, and a circuit for implementing measurement and control functions. It is equipped with a 15 MHz 68HC000 CPU, supports A32/A24/D32/D16/D8 (EO) VMEbus slave interfaces and a 64 Kbyte VMEbus memory window. The data exchange interface complies with ANSI/IEEE standard 754-1985 (32-bit floating-point operation).

Core functions and parameters

Measurement function

Event Count: Up to 4 billion events, with an input frequency range of up to 2.5 MHz. The counting range can reach 232 in long mode and 216 in word mode.

Frequency measurement: ranging from -1.16 × 10-3 Hz to 2.5 MHz; The maximum accuracy of a 16 bit counter is 0.015% between 0.007 and 76 Hz, and the error is 100 × (frequency/5 MHz) between 76 Hz and 2.5 MHz; The 16 bit enhanced resolution counter (requires two 16 bit counters) has a range of 0.001 Hz to 1.25 MHz.

Cycle/pulse width measurement: Supports 16 bit and 32-bit, discrete or continuous modes, with low data transmission latency. The range of a 16 bit counter is 131.07 s to 400 ns, and the range of a 16 bit enhanced resolution counter (requiring two 16 bit counters) is 858.9 s to 800 ns. In 32-bit integer operations, two 16 bit counters are required for pulse width measurement, and three 16 bit counters are required for cycle measurement.

Orthogonal position measurement: sine/cosine input range from DC to 1 MHz, 32-bit counter, supports limit/modulus check, accuracy is ± 1/4 wave (5 MHz sampling rate), each encoder requires two channels.

Generate function

Square wave/pulse sequence generation: frequency range from 0.0076 Hz to 2.5 MHz.

Timer/Periodic VMEbus Interrupter: Frequency range from 0.0076 to 1000 Hz.

Pulse sequence mode: can generate a sequence of N pulses, with programmable duty cycle.

Orthogonal position control output: ± 1/4 wave control resolution, up to 1.25 MHz step speed and ± 32767 steps/command.

Other functions

Event triggered timer delay: Generate VMEbus interrupt at most 131.1 seconds after input at the event edge, which can be triggered again.

24 control/measurement interfaces: including 24 clocks, 24 gates, and 24 outputs.

Supports RS-422 differential interface and single ended TTL input.

Options for configuring 4, 8, 16, and 24 interfaces.

System and Physical Specifications

System time base: 5 MHz, accuracy/stability of ± 0.005%.

Power requirements:+5 V ± 5/-2.5%, typical 4.25 A, maximum 5 A.

Temperature range: Operating temperature from 0 to 65 ° C, non operating temperature from -40 to 85 ° C, humidity from 5 to 95% RH without condensation.

VMEbus compatibility: Complies with ANSI/IEEE 1014-1987, IEC 821 and 297, supports A32/D32 DTB slaves, base address can be selected on a 64 Kbyte boundary, supports monitoring/non privileged address modification codes, dual interrupt module can assert any one of IRQ1 to IRQ7, board size 160 × 233.4 mm.

Input/output buffer specifications

Input buffer

Common mode voltage limit: ± 25 V.

Differential mode voltage limit: ± 5 V (due to 1/4 W, 120 Ω terminal resistance).

Differential mode V IH/V IL: Compliant with RS-422 standard, V IH refers to the main (positive) input voltage being 100 mV higher than the differential (negative) input voltage within the ± 25 V common mode voltage range; V IL refers to the main (positive) input voltage being 100 mV lower than the differential (negative) input voltage within the ± 25 V common mode voltage range.

Single pole (single ended) mode V IH/V IL: V IH=V TTL+100mV, V IL=V TTL − 100mV.

Input lag: 50 mV.

Suggested input rise time: minimum 5 ns, typical propagation delay 25 ns, maximum 1 ms.

Output buffer

AM26LS31 is used.

Short circuit current: Typical I SC=-60mA.

Differential output voltage: minimum ∣ V t ∣=2V.

Interface and Connection

Discrete wire connectors and terminal blocks: It is recommended to use connector components from Harting Elektronik, Inc., such as 96 pin discrete wire connectors (model 0903-096-3214).

RS-422 differential signal: Twisted pair insulated wire (24 AWG solid or multi stranded copper conductor) should be used,

R<30Ω/1000

ft）， The maximum cable length is 4000 feet, and it is necessary to ensure that each signal group is properly grounded.

TTL signal: 96 conductor flat ribbon cable (30 AWG insulated copper multi strand conductor) can be used, corresponding to ERNI 913.031 or similar 96 pin DIN female connector. It is recommended that the total cable length not exceed 50 feet.

If the front panel I/O signal needs to be led out to the terminal block, it is recommended to use VMIAC-BT04 dual 96 pin transition panel and connect it through a 96 conductor ribbon cable (recommended to be 3 feet long).

Application field

Including rotary axis instruments (angular position, velocity, acceleration), automotive industry testing (brakes, transmissions, tachometers), robotics, telescopes/observatories, medical/laboratory instruments, linear position measurement (distance, velocity, acceleration), elevators, bridge cranes, X-Y workbenches, machine tools, automatic storage and retrieval, etc.

Product Overview

Basic introduction: VMIVME-2511 is a programmable I/O board compatible with VMEbus. It uses two Motorola MC68230 parallel interface/timer chips and one Motorola MC68153 bus interrupt module, with multiple functions and features.

Key Features

48 bit I/O (including bit I/O, unidirectional 8-bit and 16 bit, bidirectional 8-bit and 16 bit).

Interrupt generation logic, supporting four interrupt sources, each MC68230 has one timer interrupt and one port interrupt.

Optional high current driver with a current filling capacity of up to 64mA.

Two 24 bit programmable timers, supporting software programmable timer mode.

Optional handshake timer that can be connected to various low-speed, medium speed, or high-speed peripherals or other computer systems.

Equipped with Centronics parallel interface.

Physical description and specifications

Physical description: Composed of VMEbus compatible logic, interrupt control logic, and I/O control logic related to parallel interface/timer modules. VMEbus compatible logic includes address decoding logic and data transmission control logic, supporting VMEbus read and write data transmission; The interrupt control logic utilizes Motorola MC68153 BIM to allow port and timer interrupts from each parallel interface/timer; The parallel I/O port is programmable and supports multiple modes. The high current driver option can provide up to 64mA of surge current capability, but does not support bidirectional mode. If the bit I/O mode is selected, all A port data bits must be programmed in the same direction.

Features

Compatibility: Complies with VMEbus specifications and adopts dual height external dimensions.

I/O connector type: 64 pin connector (DIN 41612).

I/O organization: Utilizing two Motorola MC68230 parallel interfaces/timers, providing multiple programmable I/O functions, buffered I/O options have driver capability limitations and do not support bidirectional mode.

Addressing scheme: An 8-bit DIP switch provides board address, and the factory default configuration is to respond to short monitoring I/O access. Users can change it to short non privileged I/O access through jumper wires.

Data polarity: can be ordered as high or low validity.

Electrical specifications: Provide parameters such as output high voltage, output low voltage, input high voltage, input low voltage, output high current, and output low current for both without and with I/O buffer.

Physical specifications

Environment: Operating temperature from 0 to 55 ° C, storage temperature from -20 to 85 ° C; relative humidity from 20% to 80%, no condensation; The cooling method is convective cooling.

Power requirement:+5V, maximum 2.5A.

Ordering information: The ordering model of VMIVME-2511 includes multiple options, including key, output options, input options, data transmission, I/O options, output resistance options, input voltage, output type, input type, etc. The input and output polarity options must be the same, and compatible connectors, strain eliminators, and PC board connectors are also provided.

Operating principle

Block diagram: VMIVME-2511 consists of 10 main subsystems, each with a detailed block diagram, including address decoding subsystem, parallel interface/timer and I/O port control logic, VMEbus interrupt subsystem, etc.

Operation Overview: Two MC68230 modules are respectively associated with P3 and P4 connectors. I/O data transmission is achieved by selecting registers on the required P/I/T modules, interrupt processing is implemented by programming the selected P/I/T modules, and the corresponding channels in 68153 BIM are enabled to enable specific interrupt sources to be responded to by the system processor. Some jumper selections vary depending on the port channel function of the P/I/T module.

I/O data transfer description: I/O transfer is performed through P3 and P4 connectors, with the help of port registers on the required P/I/T module. When equipped with optional buffers, I/O operations are a subset of the P/I/T module functionality, which limits programmability but enhances driving capability.

Interrupt capability: capable of handling four interrupt requests, with each P/I/T module supporting two requests (port interrupt request and timer interrupt request)