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Product Overview

VMIVME-4150 is a 12 bit analog output board that provides 12 fully isolated high-quality 12 bit analog output channels on a single 6U spec VMEbus board. Each channel is electrically isolated from all other channels and VMEbus, with multiple output ranges and functions, suitable for various industrial scenarios.

​Core functions and parameters

Key Features

12 completely isolated analog output channels, with isolation voltages of up to 1000 Vpk between channels and between channels and the bus.

12 bit resolution, bipolar voltage output range can be selected as ± 2.5 V, ± 5 V, or ± 10 V; unipolar voltage output range can be selected as 0 to 2.5 V, 0 to 5 V, or 0 to 10 V.

The voltage output has a 10 mA load capacity within the full ± 10 V range, with optional 4 to 20 mA, 0 to 20 mA, or 5 to 25 mA current loop outputs.

The voltage output accuracy is 0.05%, and the current loop output accuracy is 0.08%. There are 4, 8, or 12 channel configurations to choose from.

Using optical data coupling to provide complete galvanic isolation, static read back data registers simplify program control, and the front-end panel can be used for on-site connections.

The program controlled voltage output connection/disconnection operation facilitates system testing.

working principle

Internal functional structure

Composed of VMEbus interface, channel control, isolated analog output, and DC/DC power converter.

VMEbus interface: Communication with VMEbus is controlled by a single electrically programmable logic device (EPLD). Data and control registers are distributed in three channels to control the EPLD, respond to bus data transmission requests and control data flow, and generate data transmission acknowledgement (DTACK *) after completion of transmission.

Channel control: The data transmission control of the output D/A converter is divided into three identical 4-channel groups, each group is allocated and controlled by an EPLD, supporting optional configurations of 4, 8, or 12 channels. Each channel control EPLD contains four data registers, which receive channel data words from VMEbus and provide independent data serializers for each channel.

analog output channel

Isolation: Each output channel is isolated from VMEbus and all other channels through an isolated DC/DC converter and four optocouplers. The DC/DC converter provides ± 15 VDC isolated power supply, while the optocouplers isolate digital control signals.

Digital to Analog Conversion: A serial digital to analog (D/A) converter receives a 12 bit data word and generates a specific range of output voltage. The output module converts it to a specified voltage or current output according to the configuration.

Voltage and current output: All outputs are factory configured as unipolar voltage, bipolar voltage, or constant current. The voltage output module includes a unity gain buffer and an output switch, while the current output module includes a voltage current converter and a transmission transistor.

DC/DC power converter: Each channel contains a DC/DC converter that obtains isolated ± 15 VDC power from the VMEbus+5 VDC power bus to supply power to the isolated portion of the channel.

Configuration and Installation

Unboxing process

Some components are sensitive to electrostatic discharge, and unused boards should be stored in their original packaging. When placed on the workbench, it is recommended to insert conductive materials underneath. After receiving the goods, it is necessary to check whether there is any transportation damage. If there is, a claim should be made to the carrier and VMIC should be notified. When installing or removing the board, power off and insert the board correctly into the chassis slot.

run setup

The board address and I/O access mode are controlled by replaceable jumpers on the board, including address modifier jumpers (E15), base address selection jumpers (E13, E14, E16), and output range selection jumpers. Different jumper configurations correspond to different functions and parameters.

Bipolar voltage output: It can be configured as 2.5 V, 5 V, or 10 V through user installed jumpers, and different channels correspond to different jumpers and adjustable potentiometers.

Unipolar voltage output: configurable for 0 to 2.5 V, 0 to 5 V, or 0 to 10 V, with corresponding jumpers and adjustment components.

Current loop output: Each channel has jumper wires that can be configured with internal or external power supply, supporting different current ranges.

calibration

Before leaving the factory, it has been fully calibrated. If recalibration is required, digital multimeters, card cages, expansion cards, resistors, and other equipment need to be prepared to calibrate the bipolar voltage output, unipolar voltage output, and current output according to specific steps. After calibration, appropriate sealing agents need to be used to re seal and adjust the components.

I/O cable and front-end panel connector configuration

The front-end input connectors (P3 and P4) are standard ultra small 37 pin female D-shaped connectors with specific pin layouts and assignments, corresponding to different outputs and functions.

Programming

Register Mapping

Communication is carried out through 16 block control, status, data, and identification registers mapped to the A16 short I/O space or standard A24 data space, including board identification registers (BIR), control/status registers (CSR), output data registers (ODR), etc.

Board Identification Register (BIR): Contains the identification code (22 million hexadecimal) of the VMIVME-4150 board, located in the first two words of the board base address, and is read-only.

Control/Status Register (CSR): Provides control and monitoring of board functions, including output enable, output load cycle status, data encoding, self-test LED, etc. Each bit has specific functions.

Output Data Register (ODR): Each of the 12 analog outputs has a dedicated 12 bit output data register that supports read and write operations. The data is transmitted to the output D/A converter in a serial manner.

Reset operation

The system reset operation will reset all read and write registers to zero, causing the board to be in a specific state, such as analog output level, status, data encoding, and front-end panel LED status, all of which will change accordingly.

Analog output control

The output register and data format are controlled by CSR bit D12 and can be in offset binary format or binary complement format. The output range is determined by the jumper on the board, and the voltage output can be controlled by the bit in CSR to determine the connection status with the output connector. The data is transmitted from the output data register to the output D/A converter through an internal output load cycle, during which there is a corresponding busy flag indication.

maintenance

Provided information on product maintenance and upkeep, such as checking system power, software, configuration, connections, etc. in case of product malfunction. We do not recommend user level repairs. If you need to return the item, please contact VMIC to obtain a Return Merchandise Authorization (RMA) number. The drawings and tables in the manual are for reference only.

Product Overview

VMIVME-3126 is an 8-channel or 16 channel high-resolution fully isolated analog-to-digital converter (ADC) board that can accept 2-wire isolated signals ranging from 50 mV to 10 V as input, providing isolation between channels and between channels and VMEbus. Each input is sampled and digitized by a dedicated 24 bit analog-to-digital converter, which automatically scans all inputs after on-board self-test is completed upon power on. Its accuracy is optimized through internal gain and offset correction, which are applied by a digital signal processor (DSP) in real-time mode and determined in calibration mode.

Core functions and parameters

Key Features

8 or 16 isolated input channels with source protection, 16 bit data.

The isolation voltage between channels and between channels and VMEbus is 1500 VDC (1000 VAC).

Each channel is equipped with a dedicated digitizer with an input range of ± 50 mV to ± 10 V, which can be selected by software according to the channel.

Software controlled bandwidth, 0.05 to 26 Hz (implemented through an internal DSP with a 6th order low-pass filter).

Real time offset and gain correction based on DSP, with E ² PROM storage of calibration coefficients supported by DSP (without fine adjustment potentiometer).

The conversion rate per channel is 100 SPS (samples per second).

Software controlled RTD excitation (200 mA/400 mA per channel), software controlled open circuit sensor detection.

Supported by VMIC’s I/O controller, optional current termination resistors and optional increase in input range are available.

Application field

Including power plant monitoring, machine monitoring, data acquisition, as well as applications related to RTDs, strain gauges, and thermocouples.

Features

VMEbus access and compatibility: The response to address modifiers can be selected through jumpers, including A24 or A16 address space, monitoring or user permissions (or both), D16/D8 (EO) DTB slave, with a 6U external specification.

Board address: The VMEbus base address is configured by jumper fields, and each address A23 to A8 has a jumper, so the address space occupied by the board is 256 bytes.

Operation Mode

Sampling mode: After successful onboard self-test, all inputs are sampled simultaneously when powered on.

Calibration mode: Enter calibration mode by setting the bits in the board and status register (BSR). Each channel is calibrated by the DSP using up to seven external calibration voltage inputs. The gain and offset coefficients are stored in the DSP for real-time calibration. Users can set another bit in the BSR to write the coefficients to the E ² PROM or input their own gain and offset coefficients.

Configuration mode: Enter configuration mode by setting the bit in BSR, and each channel can be individually configured with range, filter frequency, data output format, and input type (normal, RTD excitation, open circuit sensor detection).

Automatic zeroing mode: Enter the automatic zeroing mode by setting the bit in BSR. In this mode, each input is disconnected from the field through an electronic switch, connected to a ground reference, digitized, and compared with the ideal ground reading. Adjust the offset coefficient to eliminate this difference. This technology can compensate for temperature changes without calibration operations.

Self check: After the system or software is reset, it automatically runs a self check to test the onboard RAM and each ADC. The status register indicates the success or failure status of these components.

Front panel indicator: The program controlled front panel LED lights up red during startup, calibration, and channel reconfiguration, and turns off after successfully completing the above modes.

Board Identification: The Board Identification Register (BIR) contains the VMIVME-3126 identification code.

Input characteristics

Number of input channels: 8 or 16 isolated 2-wire channels, each with an active protection pin.

Isolation voltage: 1500 VDC and 1000 VAC between channels and between channels and VME.

Input range (software control)

Bipolar: ± 50 mV, ± 100 mV, ± 500 mV, ± 1 V, ± 5 V, ± 10 V

Monopolar: 0 to 50 mV, 0 to 100 mV, 0 to 500 mV, 0 to 1 V, 0 to 5 V, 0 to 10 V

Input filter: 0.05 to 26 Hz low-pass, 6th order, filter cut-off frequency controlled by software, filtering executed by DSP software, approximate Bessel response.

Accuracy: The accuracy of the full-scale range varies in different ranges, such as ± 10 V, ± 5 V, 0-10 V, 0-5 V for 0.0030% full-scale, ± 1 V for 0.0076% full-scale, etc. (applicable after calibration of the selected input voltage range).

Stability: The temperature drift is ± V/° C, and the offset error caused by temperature can be eliminated by automatic zeroing.

Input noise: The typical and maximum noise varies under different filter settings and ranges, with noise units in μ V RMS.

Bandwidth of each input: DC to Fc, Fc is 0.05 to 26 Hz (default cutoff frequency is 26 Hz).

Input impedance: minimum, powered on (not applicable to boards equipped with current input options).

Channel crosstalk: The maximum is -150 dB at 1 kHz and Fc=1 Hz.

Isolation mode suppression: 160 dB at 60 Hz and Fc=1 Hz.

Overvoltage protection: ± 25 V wire to wire.

RTD excitation (software control per channel): typical 20 PPM/° C, maximum 20%.

Open circuit sensor detection (controlled by software for each channel): It functions normally in all ranges below ± 1 V (0-1 V).

Channel protection: Active output with unity gain and 1 k Ω source impedance.

Current terminal resistance: see the available options section.

Transmission characteristics

Transfer function: E IN=E LO+[E fsr × 65536N ADC], where E IN is the channel input voltage, E LO

For the lower limit of the input range, E fsr is the full-scale input range, and N ADC is the output code.

Resolution: 16 bits.

Input sampling: All inputs are sampled simultaneously.

Integral nonlinearity: maximum ± 0.005% compared to the optimal straight line.

Channel sampling rate: 100 SPS per channel, total 1600 SPS.

Data encoding: Software programmable, binary complement or straight/offset binary.

Data buffer memory

Buffer size: 16 consecutive 16 bit data words.

Access time: 400 ns from DS to DTACK.

VMEbus access: D8 or D16.

Available options (see ordering options)

Number of input channels: 8 or 16 2-wire channels.

Current terminal resistor: a resistor placed at both ends of the input, with a maximum continuous input current of 25 mA (calibrated input specified in current units rather than voltage units).

Increase input range: The input structure can handle an input range of up to ± 200 VDC.

Physical/Environmental Characteristics

Temperature range: working (standard VME slot) 0 to+65 ° C, storage -40 to+85 ° C.

Humidity: 10 to 80% relative humidity, no condensation.

Altitude: Working up to 10000 feet (3048 meters).

Cooling: forced air convection (standard VME slot).

Size: Dual height European card (6U) board, 160 x 233.35mm.

Weight: Maximum 700 g.

Input connectors: Two 64 pin DIN connectors.

Connector data

Recommended style for connecting components P3 and P4 I/O connectors

64 pin, compatible connector (96 pin discrete) AMP 925486-1*

Discrete line, female pressure contact point (64 pin discrete) AMP 530151-6**

(64 pin connector) connector housing Harting 09 02 064 0501

Note: * The middle row is not connected; **AMP crimping tool part number 90301-2.

Power requirements

+5 VDC (± 5%), maximum 2.8 A.

Mean Time Between Failures (MTBF)

97850 hours (217F).

Product Overview

VMIVME-3100 is a mid performance 12 bit analog-to-digital converter (ADC) board that supports 16 single ended or 8-channel differential front-end analog inputs, as well as multiple multiplexing expansion boards. Expansion board utilizing AMXbus ™ The analog signal is routed from the multiplexer input to the ADC board, which also has built-in testing capabilities. The fault LED on the front-end panel can provide users with fault detection and isolation capabilities.

Core functions and parameters

Key Features

12 bit resolution, maximum conversion time of 9 μ s, acquisition time of 9 μ s (can be selected based on full-scale input voltage).

16 channel single ended multiplexer, 8-channel differential input option.

Onboard built-in testing logic for fault detection and isolation, equipped with front-end panel fault LED.

Onboard precision voltage source, supporting self check.

You can choose one ADC per slot or one ADC plus a slave MUX board.

It has overvoltage protection input, separate encoding/key controlled VME connector, dual European card appearance, and fault safety function in case of power failure.

Throughput

Analog to digital (A/D) throughput: The throughput time of the operation is the sum of the amplifier setup time (acquisition time) and the A/D conversion time. The A/D conversion time is 9 μ s, and the amplifier setup time depends on the input voltage range and gain setting.

System throughput: Supports multiple multiplexing expansion boards, and the total system throughput can be calculated according to the relevant formula, which is

F S= N(T 1+T 2+T 3)1（ Samples per second）， Where N is the number of channels, T1 is the acquisition time of the remote multiplexer, T2 is the setup time of the VMIVME-3100 amplifier, and T3 is the conversion time of the VMIVME-3100 ADC.

protection function

16 front-end analog inputs have overvoltage protection. When the+15V power supply is turned on, the maximum input voltage range is ± 35V; when the power supply is turned off, the maximum input voltage is+20V.

Operation Mode

Normal mode operation

Analog signals can be transmitted through the front panel P3 connector or AMXbus ™ (P2 connector) receiving, AMXbus ™ Supports multiple analog input multiplexing expansion boards.

The front-end panel input (P3 connector) supports 8 differential or 16 single ended analog inputs. In single ended mode, each input has a related ground signal, and multiple low-pass filter options are also available.

AMXbus ™ The operation supports connecting up to 16 VMIC multiplexer boards to one ADC, achieving high-density and low-cost analog input expansion, and also supports built-in testing functions related to VMIC analog output boards.

ADC conversion can be initiated through an external TTL compatible signal, and the external trigger conversion circuit is enabled by setting the bit in the control word.

Built in testing mode

The ADC board contains a Control Status Register (CSR), which can be used to select certain operating modes. Users can use the read and write capabilities of CSR to verify the DO-D14 function of VMIVME-3100 VMEbus logic.

On board 9 precision voltage sources (-10.000V, -7.500V, -5.000V, -2.500V, 0.000V,+2.500V,+5.000V,+7.500V,+10.000V) can be selected by the user testing subroutine to verify the correct operation and accuracy of the board, and can also be used for calibration.

Can be accessed through AMXbus ™ Interconnect VMIVME-3100, VMIVME-41XX, and VMIVME-32XX boards to perform loop testing from analog output to analog input. It can also be used in conjunction with VMIVME-4500 for fault detection and isolation.

VMEbus interface description

The VMEbus interface of VMIVME-3100 includes the logic required to connect the slave board to VMEbus and perform memory mapping in the VMEbus short I/O address space. In the write cycle of the board address, bits A01 to A15 are compared with the previously selected board address, which is selected by the DIP switch. If the address matches, a board selection signal is generated, which, together with the control signal received on the board, gates the data (DO to D15) to the CSR on VMIVME-3100.

The circuit requires+5V,+15V, and -15V voltages, with+5V provided to the board through P1 and P2 connectors. The onboard DC-DC converter generates+15V and -15V for the analog circuit

Programming related

Overview

The ADC board performs memory mapping in the VME short I/O address space, occupying only one word position within the 65535 byte VME short I/O address space. The board address is selected by DIP switches, and the short I/O space is mapped from FF0000 (hexadecimal) to FFFFF (hexadecimal). The ADC data register containing 12 bit converted digital data is a read-only register, while the control status register (CSR) is a read-write register used for board control. Since these two registers use the same address, CSR access and ADC conversion end register access are selected through data bit D15.

Description of Control Status Register (CSR)

The operating mode of the CSR programming selection board, CSR is a 16 bit read-write register. To initiate AD conversion, it is necessary to set data bit D6 in CSR and program data bits DO to D5 and D8 to D14 according to the desired operating mode. Data bit D15 is used to distinguish between two possible read cycles. Writing “0” to CSR can read the converted digital data from the ADC data register, while writing “1” can read CSR.

ADC board reads data format

To read 12 bit converted data, it is necessary to first write the low-level data bit D15 into CSR. The data is only valid when data bit D15 is read as logical ‘0’, and the valid data is included in data bits DO to D11.

Programming Example

Provides various MC68000 assembly language programming examples, including ADC conversion of P3 connector input and using AMXbus ™ Expansion of functions, testing and programming of ADC board, testing of analog output of VMIVME-4100 DAC board using ADC board, and verification of VMIVM-3200 multiplexer board in combination with VMIVME-4100 DAC board.

Configuration and Installation

Unboxing program

Some components are sensitive to electrostatic discharge, and unused boards should be stored in their original packaging. When placing the board on the workbench, it is recommended to insert conductive material underneath the board to provide conductive diversion. After receiving the goods, it is necessary to carefully inspect for any transportation damage. If there is any damage, a claim should be made to the carrier and a complete report should be sent to VMIC.

Physical installation

When installing or disassembling the board, the power should be turned off. Insert the board into the corresponding slot of the chassis, ensure correct alignment and orientation, and smoothly slide the card forward against the mating connector until it is firmly inserted.

Pre installation checklist

Before installation, it is necessary to confirm that the relevant theoretical and programming content has been read and applied. Check whether the jumper and board address switch settings installed by the factory meet the requirements, change the relevant settings as needed, confirm that the cable connection is correct, and calibrate by the factory. If recalibration is required, please refer to the relevant sections.

Board address selection switch

There are two address DIP switches on VMIVME-3100, each corresponding to an address bit or unused. When the switch is turned on, the corresponding address bit is compared with the logic “0”. During the reading and writing of the DAC board, all corresponding address bits must be compared with the switch position.

Other configurations

Address modifier response selection: The response method of the address modifier code on the board can be selected through jumper wires.

ADC output encoding selection: Factory configured for straight binary digital encoding with unipolar input and offset binary encoding with bipolar input, which can be changed to binary complement code through jumper wires.

Analog input full-scale range selection: Select the full-scale range to be digitized by the ADC through jumper (JC) and related gain resistor (R28).

RDELAY (optional) selection: The factory is configured with no RDELAY resistor, and a collection setup time of 9 μ s can be selected. Different RDELAY can be chosen as needed to obtain different collection times.

Connector Description

P1 and P2 connectors connect the VMIVME-3100 board to the VMEbus backplane. P1 contains address data and control lines, as well as all additional signals required for control data transmission and other bus functions. P2’s user I/O pins are provided by AMXbus ™ Used to control external multiplexing expansion boards and test analog output boards for VMIC.

The P3 connector is a Panduit 32 pin male connector that supports 16 single ended or 8-differential analog inputs, each with an associated analog ground pin.

calibration

There are four potentiometers adjusted on the VMIVME-3100, and the factory has correctly adjusted and applied anti loosening glue. If recalibration is required, the onboard precision benchmark needs to be calibrated first, and then used to recalibrate the ADC.

Maintenance and Warranty

maintenance

The maintenance section provides information on the maintenance and upkeep of VMIC products. If the product malfunctions, users should check the software, system configuration, electrical connections, etc. User level repairs are not recommended and should contact VMIC to obtain a Return Merchandise Authorization (RMA) number. The appendix contains drawings and charts for reference.

warranty

VMIC’s standard products are guaranteed to be free of material and process defects within 90 days from the date of shipment. For products that meet the warranty conditions, VMIC may choose to repair or replace them at its facilities. Customers are required to notify VMIC within a reasonable time after discovering defects. Prior to returning the product, they must contact the customer service department to obtain the call ticket number and RMA number. There are corresponding regulations on the transportation method and cost of the product. In some cases, VMIC does not assume warranty or liability, and the final determination of warranty eligibility is made by VMIC. The warranty period for replacement or repair products is the same as that of the original products.

Over warranty maintenance policy

VMIC’s maintenance policy for standard products is divided into two categories: product replacement and fixed price maintenance. All product repairs require return authorization, and repair pricing can be consulted with the factory representative. Payment should be made upon delivery or within 30 days after the delivery date selected by VMIC, and shipping costs should be borne by the customer (excluding warranty repairs). VMIC’s repaired products are guaranteed to be free of process and material defects for 90 days from the date of shipment to the customer, and repair rates may not apply to products that have suffered abnormal physical or electrical damage.

Product Overview

VMIVME-2540 is a 24 channel intelligent counter/controller that serves as a slave I/O module for VMEbus systems, providing high-precision digital measurement and function generation capabilities. It features a simple and consistent memory mapped user interface. It consists of three parts: a VMEbus slave DTB interface, a CPU with firmware and supporting logic, and a circuit for implementing measurement and control functions. It is equipped with a 15 MHz 68HC000 CPU, supports A32/A24/D32/D16/D8 (EO) VMEbus slave interfaces and a 64 Kbyte VMEbus memory window. The data exchange interface complies with ANSI/IEEE standard 754-1985 (32-bit floating-point operation).

Core functions and parameters

Measurement function

Event Count: Up to 4 billion events, with an input frequency range of up to 2.5 MHz. The counting range can reach 232 in long mode and 216 in word mode.

Frequency measurement: ranging from -1.16 × 10-3 Hz to 2.5 MHz; The maximum accuracy of a 16 bit counter is 0.015% between 0.007 and 76 Hz, and the error is 100 × (frequency/5 MHz) between 76 Hz and 2.5 MHz; The 16 bit enhanced resolution counter (requires two 16 bit counters) has a range of 0.001 Hz to 1.25 MHz.

Cycle/pulse width measurement: Supports 16 bit and 32-bit, discrete or continuous modes, with low data transmission latency. The range of a 16 bit counter is 131.07 s to 400 ns, and the range of a 16 bit enhanced resolution counter (requiring two 16 bit counters) is 858.9 s to 800 ns. In 32-bit integer operations, two 16 bit counters are required for pulse width measurement, and three 16 bit counters are required for cycle measurement.

Orthogonal position measurement: sine/cosine input range from DC to 1 MHz, 32-bit counter, supports limit/modulus check, accuracy is ± 1/4 wave (5 MHz sampling rate), each encoder requires two channels.

Generate function

Square wave/pulse sequence generation: frequency range from 0.0076 Hz to 2.5 MHz.

Timer/Periodic VMEbus Interrupter: Frequency range from 0.0076 to 1000 Hz.

Pulse sequence mode: can generate a sequence of N pulses, with programmable duty cycle.

Orthogonal position control output: ± 1/4 wave control resolution, up to 1.25 MHz step speed and ± 32767 steps/command.

Other functions

Event triggered timer delay: Generate VMEbus interrupt at most 131.1 seconds after input at the event edge, which can be triggered again.

24 control/measurement interfaces: including 24 clocks, 24 gates, and 24 outputs.

Supports RS-422 differential interface and single ended TTL input.

Options for configuring 4, 8, 16, and 24 interfaces.

System and Physical Specifications

System time base: 5 MHz, accuracy/stability of ± 0.005%.

Power requirements:+5 V ± 5/-2.5%, typical 4.25 A, maximum 5 A.

Temperature range: Operating temperature from 0 to 65 ° C, non operating temperature from -40 to 85 ° C, humidity from 5 to 95% RH without condensation.

VMEbus compatibility: Complies with ANSI/IEEE 1014-1987, IEC 821 and 297, supports A32/D32 DTB slaves, base address can be selected on a 64 Kbyte boundary, supports monitoring/non privileged address modification codes, dual interrupt module can assert any one of IRQ1 to IRQ7, board size 160 × 233.4 mm.

Input/output buffer specifications

Input buffer

Common mode voltage limit: ± 25 V.

Differential mode voltage limit: ± 5 V (due to 1/4 W, 120 Ω terminal resistance).

Differential mode V IH/V IL: Compliant with RS-422 standard, V IH refers to the main (positive) input voltage being 100 mV higher than the differential (negative) input voltage within the ± 25 V common mode voltage range; V IL refers to the main (positive) input voltage being 100 mV lower than the differential (negative) input voltage within the ± 25 V common mode voltage range.

Single pole (single ended) mode V IH/V IL: V IH=V TTL+100mV, V IL=V TTL − 100mV.

Input lag: 50 mV.

Suggested input rise time: minimum 5 ns, typical propagation delay 25 ns, maximum 1 ms.

Output buffer

AM26LS31 is used.

Short circuit current: Typical I SC=-60mA.

Differential output voltage: minimum ∣ V t ∣=2V.

Interface and Connection

Discrete wire connectors and terminal blocks: It is recommended to use connector components from Harting Elektronik, Inc., such as 96 pin discrete wire connectors (model 0903-096-3214).

RS-422 differential signal: Twisted pair insulated wire (24 AWG solid or multi stranded copper conductor) should be used,

R<30Ω/1000

ft）， The maximum cable length is 4000 feet, and it is necessary to ensure that each signal group is properly grounded.

TTL signal: 96 conductor flat ribbon cable (30 AWG insulated copper multi strand conductor) can be used, corresponding to ERNI 913.031 or similar 96 pin DIN female connector. It is recommended that the total cable length not exceed 50 feet.

If the front panel I/O signal needs to be led out to the terminal block, it is recommended to use VMIAC-BT04 dual 96 pin transition panel and connect it through a 96 conductor ribbon cable (recommended to be 3 feet long).

Application field

Including rotary axis instruments (angular position, velocity, acceleration), automotive industry testing (brakes, transmissions, tachometers), robotics, telescopes/observatories, medical/laboratory instruments, linear position measurement (distance, velocity, acceleration), elevators, bridge cranes, X-Y workbenches, machine tools, automatic storage and retrieval, etc.

Product Overview

Basic introduction: VMIVME-2511 is a programmable I/O board compatible with VMEbus. It uses two Motorola MC68230 parallel interface/timer chips and one Motorola MC68153 bus interrupt module, with multiple functions and features.

Key Features

48 bit I/O (including bit I/O, unidirectional 8-bit and 16 bit, bidirectional 8-bit and 16 bit).

Interrupt generation logic, supporting four interrupt sources, each MC68230 has one timer interrupt and one port interrupt.

Optional high current driver with a current filling capacity of up to 64mA.

Two 24 bit programmable timers, supporting software programmable timer mode.

Optional handshake timer that can be connected to various low-speed, medium speed, or high-speed peripherals or other computer systems.

Equipped with Centronics parallel interface.

Physical description and specifications

Physical description: Composed of VMEbus compatible logic, interrupt control logic, and I/O control logic related to parallel interface/timer modules. VMEbus compatible logic includes address decoding logic and data transmission control logic, supporting VMEbus read and write data transmission; The interrupt control logic utilizes Motorola MC68153 BIM to allow port and timer interrupts from each parallel interface/timer; The parallel I/O port is programmable and supports multiple modes. The high current driver option can provide up to 64mA of surge current capability, but does not support bidirectional mode. If the bit I/O mode is selected, all A port data bits must be programmed in the same direction.

Features

Compatibility: Complies with VMEbus specifications and adopts dual height external dimensions.

I/O connector type: 64 pin connector (DIN 41612).

I/O organization: Utilizing two Motorola MC68230 parallel interfaces/timers, providing multiple programmable I/O functions, buffered I/O options have driver capability limitations and do not support bidirectional mode.

Addressing scheme: An 8-bit DIP switch provides board address, and the factory default configuration is to respond to short monitoring I/O access. Users can change it to short non privileged I/O access through jumper wires.

Data polarity: can be ordered as high or low validity.

Electrical specifications: Provide parameters such as output high voltage, output low voltage, input high voltage, input low voltage, output high current, and output low current for both without and with I/O buffer.

Physical specifications

Environment: Operating temperature from 0 to 55 ° C, storage temperature from -20 to 85 ° C; relative humidity from 20% to 80%, no condensation; The cooling method is convective cooling.

Power requirement:+5V, maximum 2.5A.

Ordering information: The ordering model of VMIVME-2511 includes multiple options, including key, output options, input options, data transmission, I/O options, output resistance options, input voltage, output type, input type, etc. The input and output polarity options must be the same, and compatible connectors, strain eliminators, and PC board connectors are also provided.

Operating principle

Block diagram: VMIVME-2511 consists of 10 main subsystems, each with a detailed block diagram, including address decoding subsystem, parallel interface/timer and I/O port control logic, VMEbus interrupt subsystem, etc.

Operation Overview: Two MC68230 modules are respectively associated with P3 and P4 connectors. I/O data transmission is achieved by selecting registers on the required P/I/T modules, interrupt processing is implemented by programming the selected P/I/T modules, and the corresponding channels in 68153 BIM are enabled to enable specific interrupt sources to be responded to by the system processor. Some jumper selections vary depending on the port channel function of the P/I/T module.

I/O data transfer description: I/O transfer is performed through P3 and P4 connectors, with the help of port registers on the required P/I/T module. When equipped with optional buffers, I/O operations are a subset of the P/I/T module functionality, which limits programmability but enhances driving capability.

Interrupt capability: capable of handling four interrupt requests, with each P/I/T module supporting two requests (port interrupt request and timer interrupt request)

Main features of the product

The direction of each 8-bit port can be individually programmed.

Capable of injecting 64mA current.

The control register and data register use independent board address decoding.

Built in testing (BIT) logic for fault detection and isolation.

Equipped with fault LED indicator light.

Compatible with VMIC’s intelligent I/O controller product line.

Adopting high reliability DIN type I/O connectors.

Supports 8-bit, 16 bit, and 32-bit data transmission.

Optional open electrode output.

Functional characteristics

Compatibility: Complies with VMEbus specifications and adopts dual height external dimensions.

I/O connector type: Dual 64 pin DIN connector.

I/O organization: 8 I/O ports, each 8 bits wide, addressable to any address within a short monitoring or short non privileged I/O mapping.

Addressing scheme: 8 ports can be individually addressed on 8-bit or 16 bit boundaries, and address DIP switches provide unlimited short data I/O address mapping options.

Built in testing: Output data can be read back in real-time or in offline mode. Offline mode is enabled by writing to the control and status register (CSR) to set the test mode bit. When the test mode is enabled, all outputs are in three states, providing two test mode bits. If necessary, each connector’s I/O (32-bit) can be independently tested.

Fault LED: It lights up during power startup and system reset, and can be turned off after successful diagnosis under program control.

I/O circuit: The transceiver supports high current input (64mA) output, and the logic level TTL I/O option uses the SN74AS645 octal bus transceiver. The open collector electrode option uses the SN74AS641 transceiver. If the open collector electrode option is ordered, all 64 bits are only output.

Product model: There are multiple models of this product, with 2510 being the original design (one test mode bit); 2510A has two test mode bits (one for each connector); 2510B is recommended for new designs (two test mode bits).

Ordering Options

A (input/output type and data polarity): 1 is TTL logic level input and output, positive logic; 2 is TTL logic level input and output, negative logic; 3 is an open electrode output (no input), positive logic; 4 is an open electrode output (no input) with negative logic.

B (output resistance): 0 is an uninstalled resistor; 1 is 2.2k Ω (open collector electrode input/output must be selected).

C. D and E: 0 are unused.

Connector data

Compatible cable connector: Panduit No. 120-964-435E.

Strain eliminator: Panduit No. 100-000-032.

PC board header connector: Panduit No. 120-964-033A.

Physical/Environmental Characteristics

Temperature range: Operating temperature from 0 to 55 ° C, storage temperature from -20 to 85 ° C.

Relative humidity range: 20% to 80%, no condensation.

Cooling method: convective cooling.

Power requirement:+5V, maximum 3.786A.

Positive/negative logic ordering information

TTL I/O: The positive logic input option presents a high-level input voltage on each data line corresponding to logic 1 on VMEbus; The positive logic output option presents logic 1 to the output data register (ODR), presenting a high-level output voltage on each data line. The negative logic input option presents a high-level input voltage on each data line corresponding to logic 0 on VMEbus; The negative logic output option presents a logic 0 to the output data register and a high-level output voltage on each data line.

Open collector electrode output option: The positive logic output option presents logic 1 to the ODR (the corresponding bit on VMEbus is logic 1), causing the output open collector electrode transistor to conduct and provide grounding for the load; The negative logic output option presents logic 0 to the ODR (with the corresponding bit on VMEbus being logic 1), causing the open collector electrode output transistor to turn off.

IIOC compatibility

This product is compatible with VMIC’s Intelligent I/O Controller (IIOC) series and is suitable for fields such as data acquisition, process control, factory automation, as well as simulation and training markets. The IIOC software supports the I/O of this product, allowing users to load the direction of I/O on each connector offline. Therefore, IIOC does not support separate port control, and its support is limited to VMIVME-2510A or -2510B models. IIOC is a multiprocessor controller that includes a CPU, global memory, various optional host interfaces, and firmware, providing a complete I/O solution.

Product Overview

Basic function: VMIVME-2128 can provide 128 channels of high voltage and/or high current surge current output. Its open collector electrode output driver supports output voltages from 5 to 48VDC and has built-in test (BIT) logic, allowing users to verify the operation of each channel under software control.

Key Features

128 channel high-voltage digital output (5 to 48VDC), supporting 8-bit, 16 bit, or 32-bit VME data transmission.

High current open collector electrode driver (600mA current) with built-in suppression diode, output can be connected in parallel for higher driving capability, optional open collector electrode pull-up resistor.

The output has fault protection function (when the current exceeds 1.0A, the output is turned off), built-in testing logic, and a software controlled fault LED on the front panel (for built-in testing).

Users can configure address jumpers to allow for continuous addressing of multiple boards when used in a VME system.

Application scenarios: Suitable for various applications such as relay drive, lamp drive, solenoid drive, hammer drive, stepper motor drive, LED drive, high current and high voltage drive, fiber optic LED drive, etc.

Security Summary

To minimize the risk of electric shock, the chassis and system cabinets must be connected to electrical grounding, using three core AC power cords, and correctly connected to grounded sockets.

Do not operate the system in an explosive atmosphere to avoid potential safety hazards.

Operators are not allowed to remove the product casing. Component replacement and internal adjustment must be carried out by qualified maintenance personnel. When replacing components, do not connect the power cord. Even if the power cord is removed, there may still be dangerous voltage in some cases. Before contacting the circuit, the power supply must be disconnected and discharged.

Do not perform internal repairs or adjustments alone, personnel who can provide first aid and resuscitation must be present.

Do not replace components or modify the system to avoid introducing additional hazards. Product repairs should be returned to the GE Fanuc embedded system to ensure that safety functions are maintained.

Dangerous program warning: There will be a warning in the manual before potential dangerous programs, and the instructions in the warning must be followed.

Safety symbols

STOP: Inform the operator not to perform a certain operation, as it may result in personal injury or partial or complete damage to the system.

Warning: Indicates the presence of danger and reminds attention to a certain procedure, operation, or condition. Improper execution or compliance may result in personal injury or death.

CAUTION: Indicates the presence of danger and reminds attention to a certain operating procedure, operation, or condition. Improper execution or compliance may result in partial or complete damage to the system.

NOTE: Remind attention to an important program, operation, or condition.

Operating principle

Functional modules: The design of the VMIVME-2128 board mainly consists of four parts: VME basic logic, device addressing, output drivers, and built-in test logic. It supports eight 16 bit bidirectional registers, one control and status register (CSR), high-performance output drivers, typical VME basic logic, and device address jumper groups, which allow users to select the base address.

Device Addressing: Supports data transfer in short or standard I/O memory space, with monitoring and/or non privileged data access capabilities. The I/O access type is selected through jumper wires, and the factory defaults to responding to short monitoring I/O access.

VME basic logic: composed of drivers, receivers, and control logic, the DTACK generator is designed to provide high data transmission rates.

Data transmission: The data transmission transceiver supports read and write operations on 8-bit, 16 bit, and 32-bit boundaries.

Register control logic: Supports read and write operations on eight 16 bit bidirectional dual port latches, as well as read operations on CSR registers that control test modes and front panel LEDs. The 128 bit high voltage output can be addressed as four 32-bit long words, eight 16 bit words, or sixteen 8-bit bytes.

Built in testing (BIT): By enabling the test mode bit in CSR, test data can be written to any output data register (ODR) in test mode and read back during read operations. At this time, all drives are turned off (tri state), and ODR can be read independently of the test mode bit at any time. This function provides real-time loopback testing (when the output driver is connected) and offline diagnostic testing (when the output driver is disconnected from the field device) capabilities. The front panel has a fault LED for quick fault isolation to the board level. The fault LED lights up when powered on or the system is reset, and the user can turn it off after successful diagnosis.

Output driver: Equipped with thermal and surge current shutdown protection, surge current protection allows up to 990mA of surge current before the driver shuts down. If the surge current of each channel in the external circuit exceeds the 990mA limit, preheating resistors should be used. SIP resistor sockets are provided on the board for these preheating resistors, which must be of bus type, with pin 1 as the common terminal and pin 1 of the socket grounded. The power rating of the SIP resistor should be sufficient to handle the required power consumption. The output driver user load return current must provide the lowest possible resistance return path to the user voltage source, and must not be returned through VME backplane digital ground. It must be returned to the user power supply through the B-row pins of the front panel connectors P3 and P4, or through pins A1 to A26 of the P2 connector if the P2 user ground option is ordered. If the user’s grounding quality is poor, causing the user’s load to return current to the digital grounding of the backplane, fuse F1 will melt and make the board unable to work. A blown fuse usually indicates poor grounding quality for the user, and this fuse circuit is necessary for the digital input grounding return of the control signal to the output driver.

P2 user grounding option: The user grounding is connected to all B-row pins of the front panel connectors P3 and P4. If the P2 user grounding option is ordered, these grounds are also routed to pins A1 to A26 of the backplane P2 connector through the installation of short-circuit bars SB1 to SB4 (RP33 to 36). The external power supply grounding (user grounding) can now be accessed from the P2 backplane connector of the VME chassis. All 26 wires are required to provide a low resistance user load current return path. For a typical 300mA/channel load, the current of each wire can reach up to 1.48A. Each unused wire means that its current must be shared by the remaining wires, so 28 AWG or larger wires should be used.

Configuration and Installation

Unpacking procedure: Some components on GE Fanuc embedded system products may be sensitive to electrostatic discharge. When placing the board on a workbench for configuration and other operations, it is recommended to insert conductive material underneath the board to provide conductive diversion. Unused boards should be stored in their original packaging. After receiving the product, all precautions in the transport container should be followed, all items should be carefully unpacked, and a thorough inspection should be conducted for any transport damage. All claims arising from transport damage should be made to the carrier and a complete report should be sent to the GE Fanuc embedded system, requesting advice on the handling of damaged items.

Jumper and switch positions: Introduces the physical positions on the jumper, and the address modifier can change the configuration by installing the jumper at the appropriate position on connector H1, supporting multiple I/O access types. The address selection jumper is used to specify the starting board address for data transmission. The installed jumper is equal to zero, and the omitted jumper is equal to one. The factory default configuration is to respond to 0000 HEX in the short monitoring space.

I/O cable and front panel connector configuration: The output connectors (P3 and P4) on VMIVME-2128 are 96 pin DIN standard and can be used with various cables and matching connectors. Users can refer to the relevant application guide for more information. Detailed explanation of the use of user I/O pins and external voltage input for connector P2, as well as the pin configuration of output connectors for P3 and P4. The VMIVME-2128 board is designed with a high-quality ground plane, which is connected to the VME ground through fuse F1 and to the B-row pins on connectors P3 and P4 to enhance noise resistance and improve operational reliability. Users are also reminded that the grounding conductor should be connected to the power supply (GND return) associated with these signal loads, and the grounding connection should prevent excessive current (DC or noise) from flowing through the VME backplane. External user voltage should not be applied to VMIVME-2128 without connecting the VME backplane+5VDC. If these voltages cannot be applied and removed together, the preferred order is: user voltage is connected last and disconnected first.

Optional user grounding: If the user grounding option is ordered, the output return is routed to pins A1 to A26 of P2 through the installation of short-circuit bars SB1 to SB4, allowing access to the external power supply grounding from the P2 backplane of the VME chassis. It is important to maintain the grounding path resistance lower than the VME grounding path resistance and use as many wires as possible to lead out these grounding points. The current in the wires may be large, so 28 AWG or larger wires should be used, while being careful not to exceed the maximum current rating of the connector pins.

Preheating resistor: When the incandescent lamp is initially turned on, the cold filament resistor is the smallest, usually allowing 10 to 12 times the surge current. A surge current of 1A or greater will force the output driver to enter the return current limit. To avoid this problem, preheating or current limiting resistors should be used in the lamp circuit. The preheating resistor should consume about 10% of the rated (hot) current of the bulb. A ten pin SIP socket is provided on the board for preheating resistors, which must be bus type, with pin 1 as the common terminal and pin 1 of the socket grounded. The power rating of the preheating resistor should be sufficient to handle the required power consumption.

Programming

Register Mapping: VMIVME-2128 includes a 16 bit board ID register, a 16 bit CSR, and eight 16 bit ODRs, providing register address mapping. ODRs allow control of 128 high-voltage digital output channels, which can be addressed as four 32-bit long words, eight 16 bit words, or sixteen 8-bit bytes. ODRs can be read under program control for data verification or diagnostic testing. CSR and board ID can be addressed as 16 bit words or two 8-bit bytes, and ID and CSR bit mappings as well as ODR bit mappings are provided. The board uses a 32 byte address space.

Detailed programming: In output data transmission, the data register address mapping displays the correspondence between ODR (DR0 to DR7) and output data channels 127 to 0. The built-in testing function provides real-time loopback data verification and offline diagnostic execution capability. The offline built-in testing function is activated by setting the test mode (TM) bit in CSR to logic “zero”. When the TM bit is set, all output drivers are in three states, and test data can be written into the selected data register and read back during read transmission without affecting the user device. When the test mode is turned off, the data can also be read back, allowing online testing of the board. The test mode bit and fault LED control bit are initialized to active state when powered on or system reset, so the fault LED lights up and the output driver is disabled. A simplified programming flowchart is also provided.

Maintenance

When a product malfunctions, it is necessary to first check the software, system configuration, electrical connections, jumper or configuration options, whether the board is fully inserted into its correct connector position, whether the connector pins are clean and free of contaminants, whether there are components or adjacent boards disturbed when inserting or removing the board from the chassis, and the quality of cables and I/O connections.

If you need to return the item, you need to contact GE Fanuc Embedded System to obtain a Return Merchandise Authorization (RMA) number, which can be obtained via email. Customer service can also be contacted by phone or email.

User level maintenance is not recommended, and the drawings and charts in the manual are for reference only.

Product Overview

Basic information: VMIMPC-5790 is a device based on LSI Symbios ®  The PMC dual channel Ultra160 SCSI host adapter of SYM53C1010 highly integrated PCI dual channel Ultra160 SCSI controller is suitable for embedded applications that require high throughput. It can maximize throughput while reducing transmission latency and host processor overhead. The host BIOS configures it as two independent Ultra160 SCSI channels.

Hardware features

64 bit, 33/66 MHz PCI interface, no external memory required.

Dual transition clock, with a throughput of up to 160 Mbyte/s per channel, supporting 64 bit addressing through dual address cycles (DACs).

Compliant with PCI 2.2, PCI Power Management 1.1, and PC99 standards, it has functions such as cyclic redundancy check (CRC), domain validation, and asynchronous information protection (AIP).

High performance PCI multifunctional device, presenting only one electrical load to the PCI bus, with two independent wide Ultra160 SCSI channels, equipped with SCSI Interrupt Steering Logic (SISL) backup interrupt routing, supporting Nextreme ™  RAID。

Operating System Support: Supports Windows NT and 95/98, Novell NetWare, Linux, Solaris, UnixWare, OS/2, and other operating systems.

Target applications: Storage Area Networks (SANs), server cluster environments, embedded RAID, low-cost PCI host adapters, host motherboards, etc.

Function Description

Core controller: using Symbios ®  The SYM53C1010 controller is fully compatible with the Ultra160 SCSI standard and supports multiple standards such as Fast SCSI, Ultra SCSI, Ultra2 SCSI, and Ultra160 SCSI. The dual transition clock enables a throughput of up to 160 Mbyte/s for each channel and a total throughput of 320 MBps, without the need to increase the interface clock frequency.

Data protection: Using the same CRC algorithm as FDDI, Ethernet, and Fiber Channel, it can detect various errors; AIP protects all non data stages and enhances the CRC function of Ultra160; SureLINK ™  Domain validation technology can detect SCSI bus configuration and automatically test and adjust transmission rates. The controller also has Margining (Level 3) domain validation function.

PCI Interface: Complies with PCI Local Bus Specification Revision 2.2, implements 64 bit/66 MHz PCI bus, backward compatible with 32-bit/33 MHz bus, is a true PCI multifunctional device, uses a REQ/- GNT/pair to arbitrate PCI bus master, generates separate interrupt signals for SCSI functions A and B, supports multiple power states and extended access cycles.

SCSI memory: Supports up to 1 Mbyte of external expansion ROM through parallel interfaces, supports local programming FLASH memory, and the serial 2-wire interface on each SCSI channel can be connected to external serial EEPROM for storing subsystem vendor IDs and subsystem IDs.

SCSI Processor: Provides two independent Ultra160 SCSI controllers on a single chip, integrated with LVDlink ™  Transceiver, supports LVD and single ended signals without the need for an external transceiver. The on-chip SCSI clock quadrupler enables the chip to achieve Ultra160 SCSI transfer rate at an input frequency of 40 MHz, with 8 Kbytes of internal RAM per channel for SCRIPTS ™  Instruction storage, 944 byte DMA FIFO can efficiently transmit data in bursts.

SCSI terminal: All SCSI buses require terminal networks at both ends. The host adapter uses UCC5630A terminal IC to automatically detect the SCSI bus and switch terminal modes. The device type is determined based on the type of device connected to the bus, and the device type is identified through the DIFSENS signal line. Header E1 pins 3 and 4 enable automatic terminal function.

Media connection: Supports dual 68 pin VHDCI external connectors.

Software Drivers: To optimize the performance of PCI based adapter cards, provide software drivers compatible with the Windows NT operating system, which can be obtained through the VMIC website or by contacting customer service for drivers not available on the website.

Reference List

For detailed instructions on the PCI local bus, please refer to the PCI local bus specification and obtain it from the PCI Special Interest Group.

For detailed instructions on SCSI, please refer to the fourth edition of Basics of SCSI and obtain it from Ancot Corporation.

For a detailed explanation of the SYM5301010 dual channel Ultra3 SCSI controller, please refer to the relevant documentation and obtain it from LSI Logic Corp.

For detailed instructions on the UNITRODE UCC5630A multi-mode SCSI 9-wire terminator, please refer to the relevant data manual obtained from UNITRODE Corporation.

The physical description and specifications can be found in the product specification document, which can be obtained from VMIC.

Security Summary

To minimize the risk of electric shock, the chassis and system cabinets must be connected to electrical grounding, using three core AC power cords, and correctly connected to grounding sockets.

Do not operate the system in an explosive atmosphere to avoid creating a safety hazard.

Operators are not allowed to remove the product casing. Component replacement and internal adjustment must be carried out by qualified maintenance personnel. When replacing components, do not connect the power cord. Even if the power cord is removed, there may still be dangerous voltage in some situations. Before contacting the circuit, the power supply must be disconnected and discharged.

Do not perform internal repairs or adjustments alone, personnel who can provide first aid and resuscitation must be present.

Do not replace components or modify the system to avoid introducing additional hazards. Product repairs should be returned to VMIC to ensure that safety functions are maintained.

Dangerous program warning: There will be a warning in the manual before potential dangerous programs, and the instructions in the warning must be followed.

Safety symbols

Multiple safety symbols are used in the manual, representing dangerous voltage, protective conductor terminals, low-noise or noiseless clean grounding terminals, frame or chassis terminals, AC power supply, DC power supply, AC/DC power supply, prohibited operation (which may cause personal injury or system damage), warning (which may cause personal injury or system damage), caution (which may cause system damage), attention (emphasizing important information), etc.

Operating principle

PCI Addressing: There are three types of PCI defined address spaces: configuration space, memory space, and I/O. The configuration space is a continuous set of addresses dedicated to each “slot” or “stub” on the bus. Ultra160 SCSI contains two sets of configuration registers, which BIOS uses to initialize devices and determine whether to access the configuration register space through C_BE [7:0]/decoding. The IDSEL bus signal is “chip selection”, which allocates base addresses for memory access and I/O access during initialization, and accesses by comparing the base address with values on the address/data bus.

Supported PCI bus commands: Bus commands indicate the transaction type requested by the target host device, encoded through C_BE [7:0]/line in the address phase, and support multiple command types such as I/O read cycle, I/O write cycle, memory read, memory write, etc.

PCI bus configuration register: The configuration register is only accessed by the system BIOS during the PCI configuration cycle and cannot be accessed by users. It includes various registers such as device ID, vendor ID, status/command register, class code/revision ID register, etc. Each register has its specific bit definition and function.

SCSI interface registers: The control registers of the SCSI core can be directly accessed from the PCI bus through memory or I/O mapping. SCSI functions A and B contain the same register set, and the address mapping table lists the addresses and names of each register. The phase mismatch register contains the byte count and addressing information required to update the direct, indirect, or table. The host CPU can only access some registers when executing SCRIPTS in SYM53C1010.

Configuration and Installation

Unpacking procedure: Product components are sensitive to static electricity and should be placed on conductive materials during handling. When not in use, they should be stored in their original packaging. Upon receipt of the product, it should be checked for any transportation damage. If so, a claim should be made to the carrier and VMIC notified.

Physical installation: Do not power on when installing or removing the board. The appearance and installation program of the PMC slot in the host system differ greatly. It is recommended to first check the host system installation program. The installation steps include removing the motherboard, installing the board to the PMC connector and fixing it, reinstalling the motherboard and powering it on. The board design complies with relevant PCI signal specifications.

Cable configuration: The SCSI connection uses a dual channel 68 pin VHDCI external connector. The front panel SCSI connector consists of two 68 position VHDCI right angled stacked sockets, representing channels A and B respectively, which can connect multiple SCSI devices. Terminal handling should be noted. When Ultra160 SCSI uses low voltage differential (LVD) signals, the cable length can reach 12 meters, and a single channel can connect up to 16 devices.

Maintenance

When a product malfunctions, it is necessary to first check the software, system configuration, electrical connections, jumper or configuration options, card insertion status, connector pin cleanliness, adjacent card components for interference, cable and I/O connection quality, etc.

If you need to return the item, you need to contact VMIC to obtain a Return Merchandise Authorization (RMA) number. Customer service can be contacted by phone or email.

User level maintenance is not recommended, and the drawings and tables in the manual are for reference only.

SCSI BIOS and Configuration Utility

SCSI BIOS: It is bootable ROM code that manages SCSI hardware resources, integrates with standard system BIOS, extends the standard disk service program provided through INT13h, initializes at boot time, determines the installed hard disks in the system, and maps SCSI drives.

Start SCSI BIOS Configuration Utility: During the boot sequence, this utility can be used to change the default configuration of the SCSI host adapter. Press “Ctrl-C” to start when a specific message is displayed on the screen. If all controllers are disabled, press a specific key combination to reactivate and configure them during restart.

Using the configuration utility: The screen is divided into a title area, menu area, main area, and footer area, each with its own functions. Users can operate them through specific keys, such as F1 for help, arrow keys for selecting items, etc.

Main menu: After calling the utility, it displays a list of up to 256 LSI Logic PCI to SCSI host adapters and their information in the system. You can select the adapter to view and modify its properties, or choose to start the adapter list and global properties options.

Startup adapter list: Specify the startup order for multiple operating system adapters in the system, up to four adapters can be selected as bootable adapters, and adapters can be added or removed.

Global properties: can set display and video modes, as well as whether to pause when displaying alert messages, including multiple configurable options.

Adapter properties: Allow viewing and modifying adapter settings, as well as accessing adapter device settings, including multiple configurable fields.

Device Properties: Provides viewing and updating functionality for various device settings of the adapter, including multiple configurable fields.

Exit SCSI BIOS Configuration Utility: As some changes only take effect after system restart, it is necessary to correctly exit the utility, press the Esc key, and respond to subsequent verification prompts, otherwise some changes may not take effect.

Basic Product Information

Product type: 32-bit optically isolated digital output board, specially designed and optimized for VMEbus, adopting dual Eurocard specifications, with 32 optically isolated high-level outputs.

Main functions: Implement digital output through VMEbus compatible logic, data control logic, and four 8-bit output registers, supporting 8-bit and 16 bit data transmission. The optocoupler isolates 32 outputs from each other and from VMEbus, supporting monitoring and non privileged data transmission.

Main characteristics

Equipped with 32 optically isolated outputs, the output current can be selected from 2.5mA or 300mA.

External pull-up voltage is provided to achieve maximum isolation, with on-site configurable pull-up resistors.

Capable of source or drain output, with a high output voltage tolerance of 30V in normal mode under low current options.

High isolation potential, capable of withstanding 1kV continuous voltage and 6kV pulse voltage, supporting positive or negative true options.

Supports 8-bit or 16 bit data transmission, with onboard DIP switches providing 14 bit board address selection. It adopts dual Eurocard format with front panel, allowing for on-site selection of non privileged or monitored short I/O transmission.

Application scenarios

Used for digital control of VMEbus, eliminating system grounding loops, controlling in high electrical noise environments, and controlling multi potential system components.

Ordering Options

Data polarity (A): 1 is positive true, 2 is negative true.

Output current (B): 0 is 2.5mA, 1 is 300mA.

CDE: All are 0 (reserved options for future use).

Special Sales Order (F): 0 is the standard VME front panel (without conforming coating), 1 is reserved, and 2 is the standard VME front panel (with conforming coating).

Connector data: Provides Panduit numbers for compatible cable connectors, strain eliminators, and PC board header connectors, also known as ITW/Pancon.

Functional characteristics

Compatibility: It is a standard dual height VME printed circuit board that is electrically and mechanically compatible with VMEbus.

Addressing scheme: It can be addressed to four 8-bit ports or two 16 bit registers, located on any 32-bit boundary within the short monitoring or short non privileged I/O space.

Board address: Selected by 14 onboard DIP switches, supports running in any available slot on the VMEbus backplane (except for slot 1).

VMEbus access: Address modification bits are decoded to support short monitoring or non privileged short I/O access, providing a single jumper to support this option, factory configured for short monitoring I/O access.

Data transmission types: D16, D8 (EO).

Access time: Maximum 250ns.

Output characteristics

Output current mode: There are high current and low current options, with specific parameters shown in Table 1.

Output configuration: including current absorption with pull-down resistor, current absorption without pull-down resistor, and voltage source (low current mode).

Output leakage current: The high current version has a maximum of 500 μ A under specific conditions; The low current version has a maximum of 50nA under specific conditions.

Output voltage: maximum 30V.

Switching time: see Table 1.

Output isolation: minimum 10M Ω.

Isolation voltage: The maximum continuous voltage from the site to VMEbus is 1000V, and 6000V lasts for 1 second; The maximum continuous voltage from channel to channel is 500V.

Physical/Environmental Specifications

Size: Dual height Eurocard, height 9.2 inches (233.4mm), depth 6.3 inches (160mm), thickness 0.8 inches (20.3mm).

Power requirement: Typical 1.5A at+5VDC, maximum 2.2A.

Airflow: Forced air convection, 400CFM.

Temperature: Operating temperature from 0 to+55 ° C, storage temperature from -20 to+85 ° C.

Altitude: Working altitude 0-10000 feet (3000m).

Humidity: Operating relative humidity of 20% to 80%, no condensation.

MTBF：153, 100 hours (under stress).

Output connector: Front panel 64 pin DIN connector.

Related products and applications

GE Fanuc embedded systems provide a wide range of digital I/O products for VME systems and support these products through comprehensive application information.

Specify factory options

To meet various control output requirements encountered in VMEbus applications, the following features of VMIVME-2170A can be specified as factory options: data polarity (positive or negative true), pull-up resistor socket (users can choose and install pull-up resistors), and output current (2.5 or 300mA absorption).

Product Overview

Basic information: VMIPCI-5565 is a PCI based reflective memory real-time fiber optic network product for GE Fanuc embedded systems, belonging to the VMIxxx-5565 series. It can be integrated into the network with other members of the series through standard fiber optic cables, and each board is called a node, allowing computers and other devices with different architectures and operating systems to share data in real time.

Key Features

A high-speed and easy-to-use fiber optic network with a serial rate of 2.12 Gbaud.

Supports PCI 64 bit 66MHz transmission, network operation does not require the involvement of a host processor.

Equipped with redundant operation mode, supporting up to 256 nodes.

The multi-mode fiber optic connection distance can reach up to 300 meters, and the packet size is dynamically variable (4-64 bytes).

The transmission rate varies depending on the packet size, with 47.1MB/s for 4-byte packets and 174MB/s for 64 byte packets.

Equipped with 64MB or 128MB SDRAM reflective memory with parity check, as well as two independent direct memory (DMA) channels, configurable byte order conversion to accommodate multiple CPU architectures on the same network.

Operating principle

Basic operation: Each node in the network is interconnected in a daisy chain loop through fiber optic cables, and each node needs to have a unique node ID (set through 8 onboard jumpers). The data transmission is initiated by the PCI host system writing data to the onboard SDRAM. During the writing process, the onboard circuit automatically writes the data and related information into the transmit FIFO, forming variable length data packets that are transmitted through the fiber optic interface. The receiver opens the data packet and stores it in the receive FIFO, then writes it into the local SDRAM and routes it to its own transmit FIFO until the data returns to the source node and is removed.

Register group: including PCI configuration registers, local configuration registers, runtime registers, DMA control registers, reflective memory (RFM) control and status registers. The functions and purposes of each register group are different, and some registers have different initialization methods and modification frequencies.

Reflective memory RAM: There are two specifications, 64MB or 128MB, with parity check. The starting position is specified by the base address register 3. The parity check function needs to be enabled by setting a specific register, and write operations need to be performed at the 32-bit or 64 bit boundary.

Interrupt circuit: There is a single PCI interrupt output (INTA #), and the interrupt source can be enabled and monitored separately through multiple registers. The interrupt circuit is divided into two layers, and the second layer interrupt is transmitted to the first layer through the LINTi # signal.

Redundant transmission mode: Removing the jumper blades between pins 1-2 of jumper E7 can configure it as redundant mode. At this time, each data packet is transmitted twice, and the receiving circuit evaluates the transmission situation. Although this mode reduces the probability of data loss, it will also lower the effective network transmission rate.

**Rogue packet removal operation * *: Rogue packets are packets that do not belong to any node in the network. VMIPCI-5565 can run as one of the two Rogue hosts to detect and remove rogue packets. After detection, relevant flags will be set and PCI interrupts can be triggered.

Configuration and Installation

Unpacking procedure: Components are sensitive to static electricity and should be handled on conductive materials. When not in use, they should be stored in their original packaging. Upon receipt, they should be inspected for any transportation damage and claims should be promptly processed.

Jumper configuration and position

The node ID is set by the 8 jumper blades of jumper block E4, and each node ID needs to be unique. Install the jumper blade so that the corresponding bit is low (0), and remove it so that it is high (1).

Jumper E7 controls three functions: 1-2 pins select non redundant or redundant network transmission mode, 3-4 pins enable or disable rogue host 0 function, 5-6 pins enable or disable rogue host 1 function, 7-8 pins are reserved pins and should not be installed with jumper blades. The default configuration is to install jumper blades on all pins except 7-8.

Physical installation: Before installation, it is necessary to ensure that the node ID and operation mode have been set. Power off the installation, firmly insert the board into the PCI connector and fix the screws, then reinstall the chassis cover and turn on the power. The board design complies with the PCI 2.2 specification.

Front panel description: There are three LED indicator lights, the red status LED is user-defined, and it is on by default when turned on. The status can be switched by writing to bit 31 of the control and status registers; The yellow signal detection LED lights up when the receiver detects light; The green self data LED lights up when it detects the return of its own data. There are also “RX” receiver ports and “TX” transmitter ports, which use “LC” type fiber optic cables. Dust caps should be installed when not connected to the cables, and eye injuries should be avoided when not powered.

Cable configuration: Provides cable specifications and connector specifications for multimode or single-mode fiber optic interfaces, including core diameter, cladding diameter, sheath outer diameter, attenuation, bandwidth, and other parameters, as well as connector compatibility, insertion loss, and other information.

Connectivity: Nodes are connected in a circular manner, as in the example of a circular connection of six nodes.

Programming

PCI configuration register: located in the 256 bytes of the PCI configuration space, the first 64 bytes are predefined headers that contain information such as vendor ID and device ID. Some registers can be modified by the user, while others are read-only or initialized by the system BIOS.

Local configuration registers: can be accessed through base address register offset 0 or 1, initialized to normal working configuration by serial EEPROM, and some registers can be modified by users to match the host system.

Runtime register: It is also accessed through the base address register offset 0 or 1, and will not be initialized by the serial EEPROM, maintaining the default state when the PCI bus is reset. Users need to modify some bits to activate the desired operating mode.

DMA control register: accessed through offset 0 or 1 of the base address register, it defaults to the PCI reset state and needs to be modified by the user to activate the operating mode, including DMA channel mode register, address register, etc., used to operate two DMA engines.

RFM control and status register: located in PLX local address space 0, the base address is specified by “PCI base address 2” in the PCI configuration register, including board revision register, node ID register, etc., to achieve the unique function of reflecting the memory board.

DMA operation example: It is necessary to find the value of the base address register 0, set five DMA registers, and then start the transfer and monitor the completion status by writing to the command/status register.

Example of network interrupt handling: including setting steps (clearing previous interrupts in FIFO, setting relevant registers to enable interrupts, etc.) and steps for serving network interrupts (reading registers to determine interrupt source, processing data and sender ID, etc.).

Maintain and comply with information

Maintenance: When the product malfunctions, it is necessary to first check the software, system configuration, electrical connections, etc. If a return is required, please contact GE Fanuc Embedded Systems to obtain a Return Merchandise Authorization (RMA) number. User level repairs are not recommended, and the drawings and charts in the manual are for reference only.

Compliance information: Complies with multiple international standards and regulations, such as the EU’s EN series standards, the US FCC Part 15, and Australia/New Zealand’s AS/NZS CISPR 22. Compliance requirements and restrictions vary in different regions.